M. Pak

According to our database, M. Pak authored at least 4 papers between 2019 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Ultra-low Leakage IGZO-TFTs with Raised Source/Drain for Vt > 0 V and Ion > 30 µA/µm.

S. Subhechha, Nouredine Rassoul, Attilio Belmonte, Hubert Hody, Harold Dekkers, Michiel J. van Setten, Adrian Vaisman Chasin, Shamin H. Sharifi, S. Sutar, L. Magnarin, Umberto Celano, H. Puliyalil, Shreya Kundu, M. Pak, Lieve Teugels, D. Tsvetanova, Nina Bazzazian, Kevin Vandersmissen, C. Biasotto, D. Batuk, J. Geypen, J. Heijlen, Romain Delhougne, Gouri Sankar Kar

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Device engineering guidelines for performance boost in IGZO front gated TFTs based on defect control.

S. Subhechha, Nouredine Rassoul, Attilio Belmonte, Hubert Hody, Harold Dekkers, Michiel J. van Setten, Adrian Vaisman Chasin, Shamin H. Sharifi, K. Banerjee, H. Puliyalil, Shreya Kundu, M. Pak, D. Tsvetanova, Nina Bazzazian, Kevin Vandersmissen, D. Batuk, J. Geypen, J. Heijlen, Romain Delhougne, Gouri Sankar Kar

Proceedings of the International Conference on IC Design and Technology, 2022

2021

First demonstration of ferroelectric Si: HfO2 based 3D FE-FET with trench architecture for dense nonvolatile memory application.

K. Banerjee, Laurent Breuil, A. P. Milenin, M. Pak, J. Stiers, Sean R. C. McMitchell, L. Di Piazza, Geert Van den Bosch, Jan Van Houdt

Proceedings of the IEEE International Memory Workshop, 2021

2019

Manufacturable 300mm platform solution for Field-Free Switching SOT-MRAM.

Kevin Garello, Farrukh Yasin, Hubert Hody, S. Couet, Laurent Souriau, Shamin H. Sharifi, Johan Swerts, Robert Carpenter, Sidharth Rao, Wonsub Kim, J. Wu, K. K. V. Sethu, M. Pak, N. Jossart, D. Crotti, Arnaud Furnémont, Gouri Sankar Kar

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019