M. J. BrightSky

According to our database1, M. J. BrightSky authored at least 20 papers between 2013 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A Novel Chalcogenide Based CuGeSe Selector Only Memory (SOM) for 3D Xpoint and 3D Vertical Memory Applications.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

AsSeGeS and GeN Heterostructures for Superior OTS Performance.
Proceedings of the IEEE International Memory Workshop, 2024

A Novel Program-verify Free and Low Drift Multilevel Operation on Cross-point OTS-PCM for In-Memory Computing Application.
Proceedings of the IEEE International Memory Workshop, 2024

2023
A Comprehensive Study on the Pillar Size of OTS-PCM Memory with an Optimized Process and Scaling Trends Down to Sub-10 nm for SCM Applications.
Proceedings of the IEEE International Memory Workshop, 2023

2022
Pattern Training, Inference, and Regeneration Demonstration Using On-Chip Trainable Neuromorphic Chips for Spiking Restricted Boltzmann Machine.
Adv. Intell. Syst., 2022

Endurance Evaluation on OTS-PCM Device using Constant Current Stress Scheme.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

2021
A Multi-Memristive Unit-Cell Array With Diagonal Interconnects for In-Memory Computing.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Accurate Weight Mapping in a Multi-Memristive Synaptic Unit.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021


2019

Performance Analysis of Spiking RBM with Measurement-Based Phase Change Memory Model.
Proceedings of the Neural Information Processing - 26th International Conference, 2019

2018
Reliability benefits of a metallic liner in confined PCM.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

2017
A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100× for Storage Class Memory Applications.
IEEE J. Solid State Circuits, 2017

Opportunities for Analog Coding in Emerging Memory Systems.
CoRR, 2017

2016
Recent Progress in Phase-Change Memory Technology.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

Training a Probabilistic Graphical Model with Resistive Switching Electronic Synapses.
CoRR, 2016

7.3 A resistance-drift compensation scheme to reduce MLC PCM raw BER by over 100× for storage-class memory applications.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2014
Experimental Demonstration of Array-level Learning with Phase Change Synaptic Devices.
CoRR, 2014

Brain-like associative learning using a nanoscale non-volatile phase change synaptic device array.
CoRR, 2014

2013
A 256-Mcell Phase-Change Memory Chip Operating at 2+ Bit/Cell.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013


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