M. C. Parameshwara
Orcid: 0000-0002-8401-8114
According to our database1,
M. C. Parameshwara
authored at least 6 papers
between 2017 and 2024.
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Bibliography
2024
Reconfigurable lower-part approximate adder with error-tolerant application: an approach using QCA computing.
Int. J. Ad Hoc Ubiquitous Comput., 2024
2023
Wirel. Pers. Commun., April, 2023
Defects of quantum dot cellular automata computing devices: An extensive review, evaluation, and future directions.
Microprocess. Microsystems, 2023
2022
An Area-Efficient Majority Logic-Based Approximate Adders with Low Delay for Error-Resilient Applications.
Circuits Syst. Signal Process., 2022
2021
J. Circuits Syst. Comput., 2021
2017
Low-Power Hybrid 1-Bit Full-Adder Circuit for Energy Efficient Arithmetic Applications.
J. Circuits Syst. Comput., 2017