M. C. Parameshwara

Orcid: 0000-0002-8401-8114

According to our database1, M. C. Parameshwara authored at least 6 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Reconfigurable lower-part approximate adder with error-tolerant application: an approach using QCA computing.
Int. J. Ad Hoc Ubiquitous Comput., 2024

2023
Modified LMS Beamformer for Interference Rejection.
Wirel. Pers. Commun., April, 2023

Defects of quantum dot cellular automata computing devices: An extensive review, evaluation, and future directions.
Microprocess. Microsystems, 2023

2022
An Area-Efficient Majority Logic-Based Approximate Adders with Low Delay for Error-Resilient Applications.
Circuits Syst. Signal Process., 2022

2021
Approximate Full Adders for Energy Efficient Image Processing Applications.
J. Circuits Syst. Comput., 2021

2017
Low-Power Hybrid 1-Bit Full-Adder Circuit for Energy Efficient Arithmetic Applications.
J. Circuits Syst. Comput., 2017


  Loading...