M. Akif Özkan

According to our database, M. Akif Özkan authored at least 15 papers between 2016 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Declarative Programming Techniques for Hardware Synthesis of Image Processing Applications.

M. Akif Özkan

PhD thesis, 2024

2022

Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks.

Jan Sommer, M. Akif Özkan, Oliver Keszöcze, Jürgen Teich

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

DSP-Packing: Squeezing Low-precision Arithmetic into FPGA DSP Blocks.

Jan Sommer, M. Akif Özkan, Oliver Keszöcze, Jürgen Teich

Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

2021

HipaccVX: wedding of OpenVX and DSL-based code generation.

M. Akif Özkan, Burak Ok, Bo Qiao, Jürgen Teich, Frank Hannig

J. Real Time Image Process., 2021

2020

AnyHLS: High-Level Synthesis With Partial Evaluation.

M. Akif Özkan, Arsène Pérard-Gayot, Richard Membarth, Philipp Slusallek, Roland Leißa, Sebastian Hack, Jürgen Teich, Frank Hannig

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Efficient parallel reduction on GPUs with Hipacc.

Bo Qiao, Oliver Reiche, M. Akif Özkan, Jürgen Teich, Frank Hannig

Proceedings of the SCOPES '20: 23rd International Workshop on Software and Compilers for Embedded Systems, 2020

The Best of Both Worlds: Combining CUDA Graph with an Image Processing DSL.

Bo Qiao, M. Akif Özkan, Jürgen Teich, Frank Hannig

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2018

Loop Parallelization Techniques for FPGA Accelerator Synthesis.

Oliver Reiche, M. Akif Ozkan, Frank Hannig, Jürgen Teich, Moritz Schmid

J. Signal Process. Syst., 2018

Rapid Design of Real-Time Image Fusion on FPGA using HLS and Other Techniques.

Furkan Aydin, H. Fatih Ugurdag, Vecdi Emre Levent, Aydin Emre Guzel, N. Fajar R. Annafianto, M. Akif Ozkan, Toygar Akgün, Cengiz Erbas

Proceedings of the 15th IEEE/ACS International Conference on Computer Systems and Applications, 2018

2017

Generating FPGA-based image processing accelerators with Hipacc: (Invited paper).

Oliver Reiche, M. Akif Ozkan, Richard Membarth, Jürgen Teich, Frank Hannig

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Hardware design and analysis of efficient loop coarsening and border handling for image processing.

M. Akif Ozkan, Oliver Reiche, Frank Hannig, Jürgen Teich

Proceedings of the 28th IEEE International Conference on Application-specific Systems, 2017

2016

Hybrid code description for developing fast and resource efficient image processing architectures.

Konrad Häublein, Marc Reichenbach, Oliver Reiche, M. Akif Ozkan, Dietmar Fey, Frank Hannig, Jürgen Teich

Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

FPGA-based accelerator design from a domain-specific language.

M. Akif Ozkan, Oliver Reiche, Frank Hannig, Jürgen Teich

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

Fast one- and two-pick fixed-priority selection and muxing circuits.

Mustafa Tosun, M. Akif Ozkan, Aydin Emre Guzel, H. Fatih Ugurdag

Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

Using high-level synthesis for rapid design of video processing pipes.

Aydin Emre Guzel, Vecdi Emre Levent, Mustafa Tosun, M. Akif Ozkan, Toygar Akgün, Duygu Buyukaydin, Cengiz Erbas, H. Fatih Ugurdag

Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016