Lunkai Zhang

According to our database1, Lunkai Zhang authored at least 17 papers between 2010 and 2021.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021
RISC-NN: Use RISC, NOT CISC as Neural Network Hardware Infrastructure.
CoRR, 2021

2019
Quick-and-Dirty: An Architecture for High-Performance Temporary Short Writes in MLC PCM.
IEEE Trans. Computers, 2019

Direct-modulated optical networks for interposer systems.
Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019

Balancing Performance and Energy Efficiency of ONoC by Using Adaptive Bandwidth.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019

2018
A Pipelining Loop Optimization Method for Dataflow Architecture.
J. Comput. Sci. Technol., 2018

A Non-Stop Double Buffering Mechanism for Dataflow Architecture.
J. Comput. Sci. Technol., 2018

Cooperative NV-NUMA: prolonging non-volatile memory lifetime through bandwidth sharing.
Proceedings of the International Symposium on Memory Systems, 2018

2017
An Efficient Network-on-Chip Router for Dataflow Architecture.
J. Comput. Sci. Technol., 2017

Memory cocktail therapy: a general learning-based framework to optimize dynamic tradeoffs in NVMs.
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

Quick-and-Dirty: Improving Performance of MLC PCM by Using Temporary Short Writes.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Balancing Performance and Lifetime of MLC PCM by Using a Region Retention Monitor.
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

2016
Mellow Writes: Extending Lifetime in Resistive Memories through Selective Slow Write Backs.
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016

2015
Herniated Hash Tables: Exploiting Multi-Level Phase Change Memory for In-Place Data Expansion.
Proceedings of the 2015 International Symposium on Memory Systems, 2015

2014
SpongeDirectory: flexible sparse directories utilizing multi-level memristors.
Proceedings of the International Conference on Parallel Architectures and Compilation, 2014

2013
Spontaneous Reload Cache: Mimicking a Larger Cache with Minimal Hardware Requirement.
Proceedings of the IEEE Eighth International Conference on Networking, 2013

2012
A SAT-based diagnosis pattern generation method for timing faults in scan chains.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2010
GVE: Godson-T Verification Engine for many-core architecture rapid prototyping and debugging.
Proceedings of the International Conference on Field-Programmable Technology, 2010


  Loading...