Lukás Starecek

According to our database, Lukás Starecek authored at least 5 papers between 2006 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2010

Evolutionary Design of Reconfiguration Strategies to Reduce the Test Application Time.

Jirí Simácek, Lukás Sekanina, Lukás Starecek

Proceedings of the Evolvable Systems: From Biology to Hardware, 2010

2008

Polymorphic Gates in Design and Test of Digital Circuits.

Lukás Sekanina, Lukás Starecek, Zdenek Kotásek, Zbysek Gajda

Int. J. Unconv. Comput., 2008

Reduction of Test Vectors Volume by Means of Gate-Level Reconfiguration.

Lukás Starecek, Lukás Sekanina, Zdenek Kotásek

Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

2006

Novel Logic Circuits Controlled by Vdd: Transistor-Level Simulations of Polymorphic Combinational Modules.

Lukás Sekanina, Lukás Starecek, Zdenek Kotásek

Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

Evolution of Multifunctional Combinational Modules Controlled by the Power Supply Voltage.

Lukás Sekanina, Lukás Starecek, Zbysek Gajda, Zdenek Kotásek

Proceedings of the First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), 2006