Lukas Johannes Jung

According to our database1, Lukas Johannes Jung authored at least 9 papers between 2014 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2019
Optimization of the Memory Subsystem of a Coarse Grained Reconfigurable Hardware Accelerator.
PhD thesis, 2019

Update or Invalidate: Influence of Coherence Protocols on Configurable HW Accelerators.
Proceedings of the Applied Reconfigurable Computing - 15th International Symposium, 2019

2018
AMIDAR Project: Lessons Learned in 15 Years of Researching Adaptive Processors.
Proceedings of the 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2018

Lookahead Memory Prefetching for CGRAs Using Partial Loop Unrolling.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017
A Near Optimal Integrated Solution for Resource Constrained Scheduling, Binding and Routing on CGRAs.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

2016
Optimal processor interface for CGRA-based accelerators implemented on FPGAs.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

Scheduler for Inhomogeneous and Irregular CGRAs with Support for Complex Control Flow.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

2015
Feasibility of high level compiler optimizations in online synthesis.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

2014
Synthilation: JIT-compilation of microinstruction sequences in AMIDAR processors.
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014


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