Lukang Shi

Orcid: 0000-0002-7903-6051

According to our database1, Lukang Shi authored at least 8 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Multi-Residue Two-Step Incremental ADC.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

2021
Noise-Shaping SAR ADC Using a Two-Capacitor Digitally Calibrated DAC With 82.6-dB SNDR and 90.9-dB SFDR.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A Hybrid Continuous Time Incremental and SAR Two-Step ADC with 90.5dB DR over 1MHz BW.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

2020
Noise-Shaping SAR ADC Using a Two-Capacitor Digitally Calibrated DAC with 85.1 dB DR and 91 dB SFDR.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2018
Robust Continuous-Time MASH Delta Sigma Modulator.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

A 13b-ENOB Noise Shaping SAR ADC with a Two-Capacitor DAC.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Single-Loop Delta-Sigma ADC Using Noise-Coupled VCO Quantizer.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Gain-boosted Complementary Dynamic Residue Amplifier for a 160 MS/s 61 dB SNDR Noise-Shaping SAR ADC.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018


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