Luis J. Saiz
Orcid: 0000-0002-4868-2050
According to our database1,
Luis J. Saiz
authored at least 21 papers
between 2008 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
A Hybrid Technique Based on ECC and Hardened Cells for Tolerating Random Multiple-Bit Upsets in SRAM Arrays.
IEEE Access, 2024
In-Memory Zero-Space Floating-Point-Based CNN Protection Using Non-significant and Invariant Bits.
Proceedings of the Computer Safety, Reliability, and Security, 2024
Proceedings of the 19th European Dependable Computing Conference, 2024
2019
IEEE Access, 2019
2018
IEEE Trans. Very Large Scale Integr. Syst., 2018
Proceedings of the 8th Latin-American Symposium on Dependable Computing, 2018
2016
Injecting Intermittent Faults for the Dependability Assessment of a Fault-Tolerant Microcomputer System.
IEEE Trans. Reliab., 2016
Proceedings of the 12th European Dependable Computing Conference, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
Proceedings of the 11th European Dependable Computing Conference, 2015
2014
Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor.
IEEE Trans. Reliab., 2014
Modified Hamming Codes to Enhance Short Burst Error Detection in Semiconductor Memories (Short Paper).
Proceedings of the 2014 Tenth European Dependable Computing Conference, 2014
2013
Flexible Unequal Error Control Codes with Selectable Error Detection and Correction Levels.
Proceedings of the Computer Safety, Reliability, and Security, 2013
Defining a Representative and Low Cost Fault Model Set for Intermittent Faults in Microprocessor Buses.
Proceedings of the Sixth Latin-American Symposium on Dependable Computing, 2013
Using Interleaving to Avoid the Effects of Multiple Adjacent Faults in On-Chip Interconnection Lines.
Proceedings of the Dependable Computing - 14th European Workshop, 2013
2012
Microelectron. Reliab., 2012
Analyzing the Impact of Intermittent Faults on Microprocessors Applying Fault Injection.
IEEE Des. Test, 2012
2010
Searching Representative and Low Cost Fault Models for Intermittent Faults in Microcontrollers: A Case Study.
Proceedings of the 16th IEEE Pacific Rim International Symposium on Dependable Computing, 2010
Experimental validation of a fault tolerant microcomputer system against intermittent faults.
Proceedings of the 2010 IEEE/IFIP International Conference on Dependable Systems and Networks, 2010
2008
Injecting intermittent faults for the dependability validation of commercial microcontrollers.
Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2008
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008