Luis A. Merayo

According to our database, Luis A. Merayo authored at least 4 papers between 1991 and 1997.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

1997

On the way to the 2.5 Gbits/s ATM network ATM multiplexer demultiplexer ASIC.

Jacobo Riesco, Juan Carlos Diaz, Luis A. Merayo, José Luis Conesa, Carlos Santos, Eduardo Juárez Martínez

Proceedings of the European Design and Test Conference, 1997

1996

A 2.5 Gb/s ATM switch chip set.

Pierre Plaza, Luis A. Merayo, Juan Carlos Diaz, José Luis Conesa

IEEE Trans. Very Large Scale Integr. Syst., 1996

1995

Input and output processor for an ATM high speed switch (2.5 Gb/s): the CMC.

Pierre Plaza, Juan Carlos Diaz, Fermín Calvo, Luis A. Merayo, Maurizio Zamboni, Pietro Scarfone, Marco Barbini

Proceedings of the 1995 European Design and Test Conference, 1995

1991

A microprogram-based hardware implementation of the Leaky Bucket algorithm.

Luis A. Merayo, Juan I. Solana, Luisa Mola Morales

Microprocess. Microprogramming, 1991