Luigi Ciminiera

Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994

1993

Reducing Iteration Time When Result Digit is Zero for Radix 2 SRT Division and Square Root with Redundant Remainders.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1993

Rapid Prototyping of Protocols from LOTOS Specifications.

[BibT_eX]

[DOI]

Softw. Pract. Exp., 1993

n × n carry-save multipliers without final addition.

[BibT_eX]

[DOI]

Proceedings of the 11th Symposium on Computer Arithmetic, 29 June, 1993

1992

Design of a Radix 4 Division Unit with Simple Selection Table.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1992

Throughput analysis of timed token protocols in double ring networks.

[BibT_eX]

[DOI]

Proceedings of the 17th Conference on Local Computer Networks, 1992

Probabilistic Characterization of Algebraic Protocol Specifications.

[BibT_eX]

[DOI]

Proceedings of the 12th International Conference on Distributed Computing Systems, 1992

MAP and TOP communications - standards and applications.

[BibT_eX]

Claudio Demartini

Electronic systems engineering series, Addison-Wesley, ISBN: 978-0-201-41665-7, 1992

1991

A Protocol for Multirendezvous of LOTOS Processes.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1991

On the Equivalence of IEEE 802.4 and FDDI Timed Token Protocols.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE INFOCOM '91, 1991

Simple radix 2 division and square root with skipping of some addition steps.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE Symposium on Computer Arithmetic, 1991

1990

Some Properties of Timed Token Medium Access Protocols.

[BibT_eX]

[DOI]

IEEE Trans. Software Eng., 1990

Higher Radix Square Rooting.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1990

An abstract execution model for basic LOTOS.

[BibT_eX]

[DOI]

Softw. Eng. J., 1990

Modeling the execution of LOTOS specifications by cooperating extended finite state machines.

[BibT_eX]

[DOI]

Proceedings of the Second IEEE Symposium on Parallel and Distributed Processing, 1990

1989

Authentication Mechanisms in Microprocessor-Based Local Area Networks.

[BibT_eX]

[DOI]

IEEE Trans. Software Eng., 1989

Implementation of algorithms for graphic surface modeling using transputers.

[BibT_eX]

[DOI]

Microprocess. Microprogramming, 1989

Some Properties of Double-Ring Networks with Real-Time Constraints.

[BibT_eX]

[DOI]

Proceedings of the Real-Time Systems Symposium, 1989

On the Behavior of Control Token Protocols with Asynchronous and Synchronous Traffic.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE INFOCOM '89, 1989

On the efficient implementation of higher radix square root algorithms.

[BibT_eX]

[DOI]

Proceedings of the 9th Symposium on Computer Arithmetic, 1989

1988

A Practical Study of Semi-automatic OSI Protocol Implementation.

[BibT_eX]

[DOI]

Claudio Demartini

Softw. Pract. Exp., 1988

Performance analysis of type 3 LLC in industrial 802.5 nets.

[BibT_eX]

[DOI]

Claudio Demartini

IEEE Netw., 1988

1987

Reliability and performance issues in FDDI networks.

[BibT_eX]

[DOI]

Proceedings of the 1987 Symposium on the Simulation of Computer Networks, 1987

Performance Analysis of Acknowledgment Mechanisms in Token-Bus Networks.

[BibT_eX]

Proceedings of the 8th IEEE Real-Time Systems Symposium (RTSS '87), 1987

Parallel multipliers based on horizontal compressors.

[BibT_eX]

[DOI]

Proceedings of the 8th IEEE Symposium on Computer Arithmetic, 1987

Advanced microprocessor architectures.

[BibT_eX]

Electronic systems engineering series, Addison-Wesley, ISBN: 978-0-201-14550-2, 1987

1986

A Connecting Network with Fault Tolerance Capabilities.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1986

Fault-tolerance and performance analysis of beta-networks.

[BibT_eX]

[DOI]

Parallel Comput., 1986

1985

Efficient serial-parallel arrays for multiplication and addition.

[BibT_eX]

[DOI]

Proceedings of the 7th IEEE Symposium on Computer Arithmetic, 1985

1984

iAPX 432 hardware fault-handling mechanisms.

[BibT_eX]

[DOI]

Softw. Microsystems, 1984

1983

Fast iterative multiplying array.

[BibT_eX]

[DOI]

Proceedings of the 6th IEEE Symposium on Computer Arithmetic, 1983

1982

A fault-tolerant connecting network for multiprocessing systems.

[BibT_eX]