Luigi Blasi
According to our database1,
Luigi Blasi
authored at least 2 papers
between 2019 and 2020.
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Bibliography
2020
Fault resilience analysis of a RISC-V microprocessor design through a dedicated UVM environment.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020
2019
A RISC-V Fault-Tolerant Microcontroller Core Architecture Based on a Hardware Thread Full/Partial Protection and a Thread-Controlled Watch-Dog Timer.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2019