Luciano Volcan Agostini
Orcid: 0000-0002-3421-5830Affiliations:
- Federal University of Pelotas, CDTec, Brazil
According to our database1,
Luciano Volcan Agostini
authored at least 304 papers
between 2000 and 2024.
Collaborative distances:
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Bibliography
2024
IEEE Trans. Consumer Electron., May, 2024
J. Real Time Image Process., May, 2024
A Hardware-Friendly Acceleration of VVC Affine Motion Estimation Using Decision Trees.
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024
Proceedings of the 15th IEEE Latin America Symposium on Circuits and Systems, 2024
Proceedings of the 15th IEEE Latin America Symposium on Circuits and Systems, 2024
Proceedings of the 15th IEEE Latin America Symposium on Circuits and Systems, 2024
2023
IEEE Des. Test, October, 2023
J. Real Time Image Process., June, 2023
IEEE Trans. Very Large Scale Integr. Syst., April, 2023
Multim. Tools Appl., 2023
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023
High-Throughput and Multiplierless Hardware Design for the AV1 Fractional Motion Estimation.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023
Efficient Architecture for VVC Angular Intra Prediction based on a Hardware-Friendly Heuristic.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023
Efficient Hardware Design for the VVC Affine Motion Compensation Exploiting Multiple Constant Multiplication.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
High-Throughput and Multiplierless Hardware Design for the AV1 Local Warped MC Interpolation.
Proceedings of the IEEE International Conference on Image Processing, 2023
2022
IEEE Trans. Circuits Syst. Video Technol., 2022
Configurable Fast Block Partitioning for VVC Intra Coding Using Light Gradient Boosting Machine.
IEEE Trans. Circuits Syst. Video Technol., 2022
Quality-power configurable flexible coding order hardware design for real-time 3D-HEVC intra-frame prediction.
J. Real Time Image Process., 2022
Power-Quality Configurable Hardware Design for AV1 Directional Intraframe Prediction.
IEEE Des. Test, 2022
Proceedings of the WebMedia '22: Brazilian Symposium on Multimedia and Web, Curitiba, Brazil, November 7, 2022
Hardware Design for the Separable Symmetric Normalized Wiener Filter of the AV1 Decoder.
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022
Proceedings of the Picture Coding Symposium, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Fast Affine Motion Estimation for VVC using Machine-Learning-Based Early Search Termination.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the 2022 IEEE International Conference on Image Processing, 2022
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
VVC Interpicture Prediction Using SAD with Imprecise Subtractors: A Quantitative Analysis.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
2021
IEEE Open J. Circuits Syst., 2021
IEEE Open J. Circuits Syst., 2021
J. Vis. Commun. Image Represent., 2021
J. Real Time Image Process., 2021
Fast and energy-efficient approximate motion estimation architecture for real-time 4 K UHD processing.
J. Real Time Image Process., 2021
Fast block partitioning scheme for chrominance intra prediction of versatile video coding standard.
J. Electronic Imaging, 2021
Proceedings of the International Conference on Visual Communications and Image Processing, 2021
Proceedings of the International Conference on Visual Communications and Image Processing, 2021
SAD or SATD? How the Distortion Metric Impacts a Fractional Motion Estimation VLSI Architecture.
Proceedings of the 23rd International Workshop on Multimedia Signal Processing, 2021
Exploring Operation Sharing in Directional Intra Frame Prediction of AV1 Video Coding.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
IEEE Trans. Circuits Syst. Video Technol., 2020
3D-HEVC Bipartition Modes Encoder and Decoder Design Targeting High-Resolution Videos.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
Tile Adaptation for Workload Balancing of 3D-HEVC Encoder in Homogeneous Multicore Systems.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
6WR: A Hardware Friendly 3D-HEVC DMM-1 Algorithm and its Energy-Aware and High-Throughput Design.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
Multim. Tools Appl., 2020
J. Real Time Image Process., 2020
J. Real Time Image Process., 2020
UHD 8K energy-quality scalable HEVC intra-prediction SAD unit hardware using optimized and configurable imprecise adders.
J. Real Time Image Process., 2020
IEEE Des. Test, 2020
IEEE Des. Test, 2020
IEEE Des. Test, 2020
Proceedings of the 2020 IEEE International Conference on Visual Communications and Image Processing, 2020
Proceedings of the 2020 IEEE International Conference on Visual Communications and Image Processing, 2020
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020
Directional Intra Frame Prediction Architecture with Edge Filter and Upsampling for AV1 Video Coding.
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020
A Hardware Design for 3D-HEVC Depth Intra Skip with Synthesized View Distortion Change.
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020
A Low-Complexity Algorithm and Its Low-Power and High-Throughput Architecture for 3D-HEVC DMM-1 Encoding Tool.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Low-Power and Memory-Aware Approximate Hardware Architecture for Fractional Motion Estimation Interpolation on HEVC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
ASIC Solution for the Directional Intra Prediction of the AV1 Encoder Targeting UHD 4K Videos.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Conference on Image Processing, 2020
Proceedings of the IEEE International Conference on Image Processing, 2020
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
An Overview of Dedicated Hardware Designs for State-of-the-Art AV1 and H.266/VVC Video Codecs.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
Proceedings of the 2020 IEEE International Conference on Acoustics, 2020
Proceedings of the 28th European Signal Processing Conference, 2020
Proceedings of the 28th European Signal Processing Conference, 2020
2019
IEEE Trans. Circuits Syst. Video Technol., 2019
Energy-Aware Motion and Disparity Estimation System for 3D-HEVC With Run-Time Adaptive Memory Hierarchy.
IEEE Trans. Circuits Syst. Video Technol., 2019
Energy-Efficient Hadamard-Based SATD Hardware Architectures Through Calculation Reuse.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
IEEE Trans. Circuits Syst. II Express Briefs, 2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Signal Image Video Process., 2019
Efficient reference frame compression scheme for video coding systems: algorithm and VLSI design.
J. Real Time Image Process., 2019
High-throughput and power-efficient hardware design for a multiple video coding standard sample interpolator.
J. Real Time Image Process., 2019
Fast partitioning decision making for prediction units on H.264-to-HEVC transcoding using machine learning.
Proceedings of the 25th Brazillian Symposium on Multimedia and the Web, 2019
A Knapsack Methodology for Hardware-based DMR Protection against Soft Errors in Superscalar Out-of-Order Processors.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019
Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019
IPBN: alerts management in intravenous electromedical devices using bayesian networks.
Proceedings of the 34th ACM/SIGAPP Symposium on Applied Computing, 2019
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019
TITAN: Tile Timing-Aware Balancing Algorithm for Speeding Up the 3D-HEVC Intra Coding.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Encoding Efficiency and Computational Cost Assessment of State-Of-The-Art Point Cloud Codecs.
Proceedings of the 2019 IEEE International Conference on Image Processing, 2019
Energy-Efficiency Exploration of Memory Hierarchy using NVMs for HEVC Motion Estimation.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Improving Software-based Techniques for Soft Error Mitigation in OoO Superscalar Processors.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
A New Hardware Friendly 2D-DCT HEVC Compliant Algorithm and its High Throughput and Low Power Hardware Design.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
A Fast Local Mode Decision for the HEVC Intra Prediction Based on Direction Detection.
Proceedings of the 27th European Signal Processing Conference, 2019
Proceedings of the 27th European Signal Processing Conference, 2019
Compression Efficiency and Computational Cost Comparison between AV1 and HEVC Encoders.
Proceedings of the 27th European Signal Processing Conference, 2019
Proceedings of the Data Compression Conference, 2019
Proceedings of the Data Compression Conference, 2019
2018
A reduced computational effort mode-level scheme for 3D-HEVC depth maps intra-frame prediction.
J. Vis. Commun. Image Represent., 2018
Reference frame context-adaptive variable-length coder: a real-time hardware-friendly approach for lossless external memory bandwidth reduction in current video-coding systems.
J. Real Time Image Process., 2018
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018
A Power-Efficient and High-Throughput Hardware Design for 3D-HEVC Disparity Estimation.
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018
ASIC power-estimation accuracy evaluation: A case study using video-coding architectures.
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
High-Throughput and Low-Power Integrated Direct/Inverse HEVC Quantization Hardware Design.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
DCDM-Intra: Dynamically Configurable 3D-HEVC Depth Maps Intra-Frame Prediction Algorithm.
Proceedings of the 2018 IEEE International Conference on Image Processing, 2018
Proceedings of the 2018 IEEE International Conference on Image Processing, 2018
Memory-Aware Tiles Workload Balance through Machine-Learnt Complexity Reduction for HEVC.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
Low Area Reconfigurable Architecture for 3D-HEVC DMMs Decoder Targeting 1080p Videos.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
Power-Efficient and Memory-Aware Approximate Hardware Design for HEVC FME Interpolator.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
Least-Squares Approximation Surfaces for High Quality Intra-Frame Prediction in Future Video Standards.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
Proceedings of the 2018 IEEE International Conference on Acoustics, 2018
Proceedings of the 2018 IEEE International Conference on Acoustics, 2018
Intravenous Electromedical Equipment: A Proposal to Improve Accuracy in Generating Alerts.
Proceedings of the XLIV Latin American Computer Conference, 2018
2017
J. Real Time Image Process., 2017
J. Real Time Image Process., 2017
Rate and Complexity-Aware Coding Scheme for Fixed-Camera Videos Based on Region-of-Interest Detection.
Proceedings of the 23rd Brazillian Symposium on Multimedia and the Web, 2017
Proceedings of the VII Brazilian Symposium on Computing Systems Engineering, 2017
Low-area scalable hardware architecture for DMM-1 encoder of 3D-HEVC video coding standard.
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017
Proceedings of the 19th IEEE International Workshop on Multimedia Signal Processing, 2017
Multiple early-termination scheme for TZ search algorithm based on data mining and decision trees.
Proceedings of the 19th IEEE International Workshop on Multimedia Signal Processing, 2017
Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017
Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017
Complexity reduction by modes reduction in RD-list for intra-frame prediction in 3D-HEVC depth maps.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
High-throughput HEVC intrapicture prediction hardware design targeting UHD 8K videos.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
A multiplierless parallel HEVC quantization hardware for real-time UHD 8K video coding.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the 25th European Signal Processing Conference, 2017
Proceedings of the 25th European Signal Processing Conference, 2017
Complexity reduction of 3D-HEVC based on depth analysis for background and ROI classification.
Proceedings of the 25th European Signal Processing Conference, 2017
2016
IEEE Trans. Circuits Syst. Video Technol., 2016
J. Real Time Image Process., 2016
J. Real Time Image Process., 2016
DFPS: a fast pattern selector for depth modeling mode 1 in three-dimensional high-efficiency video coding standard.
J. Electronic Imaging, 2016
Energy-aware light-weight DMM-1 patterns decoders with efficiently storage in 3D-HEVC.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016
Rate-distortion-complexity analysis for prediction unit modes in 3D-HEVC depth coding.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
An HEVC multi-size DCT hardware with constant throughput and supporting heterogeneous CUs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the 2016 IEEE International Conference on Image Processing, 2016
Proceedings of the 2016 IEEE International Conference on Image Processing, 2016
Proceedings of the 2016 IEEE International Conference on Image Processing, 2016
Proceedings of the 2016 IEEE International Conference on Image Processing, 2016
High-throughput and memory-aware hardware of a sub-pixel interpolator for multiple video coding standards.
Proceedings of the 2016 IEEE International Conference on Image Processing, 2016
Complexity reduction for 3D-HEVC depth map coding based on early Skip and early DIS scheme.
Proceedings of the 2016 IEEE International Conference on Image Processing, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
2015
IEEE Trans. Circuits Syst. Video Technol., 2015
DMMFast: a complexity reduction scheme for three-dimensional high-efficiency video coding intraframe depth map coding.
J. Electronic Imaging, 2015
Real-Time Architecture for HEVC Motion Compensation Sample Interpolator for UHD Videos.
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015
A Low-Area and High-Throughput Intra Prediction Architecture for a Multi-Standard HEVC and H.264/AVC Video Encoder.
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015
Memory-Aware and High-Throughput Hardware Design for the HEVC Fractional Motion Estimation.
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015
S-GMOF: A gradient-based complexity reduction algorithm for depth-maps intra prediction on 3D-HEVC.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015
A multi-standard interpolation filter for motion compensated prediction on high definition videos.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015
A real-time architecture for reference frame compression for high definition video coders.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Fast mode selection algorithm based on texture analysis for 3D-HEVC intra prediction.
Proceedings of the 2015 IEEE International Conference on Multimedia and Expo, 2015
Proceedings of the 2015 IEEE International Conference on Image Processing, 2015
2014
Inter-view prediction of intra mode decision for high-efficiency video coding-based multiview video coding.
J. Electronic Imaging, 2014
Proceedings of the 2014 IEEE Visual Communications and Image Processing Conference, 2014
Proceedings of the 2014 IEEE Visual Communications and Image Processing Conference, 2014
Proceedings of the 2014 IEEE Visual Communications and Image Processing Conference, 2014
Four-step algorithm for early termination in HEVC inter-frame prediction based on decision trees.
Proceedings of the 2014 IEEE Visual Communications and Image Processing Conference, 2014
Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014
A Memory Energy Consumption Analysis of Motion Estimation Algorithms using Data Reuse in Video Coding Systems.
Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014
Memory bandwidth reduction for H.264 and HEVC encoders using lossless reference frame coding.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
A new differential and lossless Reference Frame Variable-Length Coder: An approach for high definition video coders.
Proceedings of the 2014 IEEE International Conference on Image Processing, 2014
Complexity reduction for 3D-HEVC depth maps intra-frame prediction using simplified edge detector algorithm.
Proceedings of the 2014 IEEE International Conference on Image Processing, 2014
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
Proceedings of the IEEE International Conference on Acoustics, 2014
Cost function optimization and its hardware design for the Sample Adaptive Offset of HEVC standard.
Proceedings of the 22nd European Signal Processing Conference, 2014
Proceedings of the 22nd European Signal Processing Conference, 2014
2013
Iterative random search: a new local minima resistant algorithm for motion estimation in high-definition videos.
Multim. Tools Appl., 2013
A reduced memory bandwidth and high throughput HDTV motion compensation decoder for H.264/AVC High 4: 2: 2 profile.
J. Real Time Image Process., 2013
Proceedings of the 26th Symposium on Integrated Circuits and Systems Design, 2013
Proceedings of the 30th Picture Coding Symposium, 2013
Fast HEVC intra mode decision algorithm based on new evaluation order in the Coding Tree Block.
Proceedings of the 30th Picture Coding Symposium, 2013
Proceedings of the 30th Picture Coding Symposium, 2013
A real time high definition architecture for the Variable-Length Reference Frame Decoder.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013
A fast hardware-friendly motion estimation algorithm and its VLSI design for real time ultra high definition applications.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013
Low cost and high throughput FME interpolation for the HEVC emerging video coding standard.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013
A lossless approach for external memory bandwidth reduction in video coding systems and its VLSI architecture.
Proceedings of the 2013 IEEE International Conference on Multimedia and Expo, 2013
A hardware friedly motion estimation algorithm for the emergent HEVC standard and its low power hardware design.
Proceedings of the IEEE International Conference on Image Processing, 2013
Content-adaptive reference frame compression based on intra-frame prediction for multiview video coding.
Proceedings of the IEEE International Conference on Image Processing, 2013
Proceedings of the IEEE International Conference on Image Processing, 2013
An energy-efficient hardware design for lossless reference frame compression in video coders.
Proceedings of the 20th IEEE International Conference on Electronics, 2013
Proceedings of the 20th IEEE International Conference on Electronics, 2013
ES&IS: Enhanced Spread and Iterative Search hardware-friendly motion estimation algorithm for the HEVC Standard.
Proceedings of the 20th IEEE International Conference on Electronics, 2013
High throughput hardware design for the HEVC Fractional Motion Estimation Interpolation Unit.
Proceedings of the 20th IEEE International Conference on Electronics, 2013
Computational complexity control for HEVC based on coding tree spatio-temporal correlation.
Proceedings of the 20th IEEE International Conference on Electronics, 2013
Speeding up HEVC intra coding based on tree depth inter-levels correlation structure.
Proceedings of the 21st European Signal Processing Conference, 2013
Proceedings of Eurocon 2013, 2013
Proceedings of the 2013 Data Compression Conference, 2013
Simplified HEVC FME Interpolation Unit Targeting a Low Cost and High Throughput Hardware Design.
Proceedings of the 2013 Data Compression Conference, 2013
Energy-efficient memory hierarchy for motion and disparity estimation in multiview video coding.
Proceedings of the Design, Automation and Test in Europe, 2013
2012
Low-Complexity Hierarchical Mode Decision Algorithms Targeting VLSI Architecture Design for the H.264/AVC Video Encoder.
VLSI Design, 2012
Performance and Computational Complexity Assessment of High-Efficiency Video Encoders.
IEEE Trans. Circuits Syst. Video Technol., 2012
Evaluating two implementations of the component responsible for decoding video and audio in the Brazilian digital TV middleware.
Multim. Tools Appl., 2012
DMPDS: A Fast Motion Estimation Algorithm Targeting High Resolution Videos and Its FPGA Implementation.
Int. J. Reconfigurable Comput., 2012
Algorithm and Hardware Design of a Fast Intra Frame Mode Decision Module for H.264/AVC Encoders.
Int. J. Reconfigurable Comput., 2012
A Memory Hierarchy Model Based on Data Reuse for Full-Search Motion Estimation on High-Definition Digital Videos.
Int. J. Reconfigurable Comput., 2012
Performance and Energy Consumption Analysis of Embedded Applications Based on Android Platform.
Proceedings of the 2012 Brazilian Symposium on Computing System Engineering, 2012
High throughput hardware design for the Adaptive Loop Filter of the emerging HEVC video coding.
Proceedings of the 25th Symposium on Integrated Circuits and Systems Design, 2012
Proceedings of the 2012 Picture Coding Symposium, 2012
Spread and Iterative Search: A High Quality Motion Estimation Algorithm for High Definition Videos and Its VLSI Design.
Proceedings of the 2012 IEEE International Conference on Multimedia and Expo, 2012
Motion Vectors Merging: Low Complexity Prediction Unit Decision Heuristic for the Inter-prediction of HEVC Encoders.
Proceedings of the 2012 IEEE International Conference on Multimedia and Expo, 2012
High performance hardware architectures for the inverse Rotational Transform of the emerging HEVC standard.
Proceedings of the 19th IEEE International Conference on Image Processing, 2012
A memory aware and multiplierless VLSI architecture for the complete Intra Prediction of the HEVC emerging standard.
Proceedings of the 19th IEEE International Conference on Image Processing, 2012
Proceedings of the 19th IEEE International Conference on Image Processing, 2012
Fast HEVC intra mode decision based on dominant edge evaluation and tree structure dependencies.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
Proceedings of the 20th European Signal Processing Conference, 2012
2011
IEEE Trans. Consumer Electron., 2011
A High-Throughput Hardware Architecture for the H.264/AVC Half-Pixel Motion Estimation Targeting High-Definition Videos.
Int. J. Reconfigurable Comput., 2011
A comparative analysis of media processing component implementations for the Brazilian digital TV middleware.
Int. J. Inf. Technol. Commun. Convergence, 2011
Two fast multi-point search algorithms for high quality motion estimation in high resolution videos.
Int. J. Inf. Technol. Commun. Convergence, 2011
Two Novel Algorithms for High Quality Motion Estimation in High Definition Video Sequences.
Proceedings of the 24th SIBGRAPI Conference on Graphics, 2011
An efficient ME architecture for high definition videos using the new MPDS algorithm.
Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011
An efficient memory hierarchy for full search motion estimation on high definition digital videos.
Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011
Tests and Performance Analysis of Media Processing Implementations for the Middleware of Brazilian Digital TV System Using Different Scenarios.
Proceedings of the 5th FTRA International Conference on Multimedia and Ubiquitous Engineering, 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
SHBS: A heuristic for fast inter mode decision of H.264/AVC standard targeting VLSI design.
Proceedings of the 2011 IEEE International Conference on Multimedia and Expo, 2011
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011
Proceedings of EUROCON 2011, 2011
Run-time adaptive energy-aware motion and disparity estimation in multiview video coding.
Proceedings of the 48th Design Automation Conference, 2011
2010
High Throughput and Low Cost Architecture for the Forward Quantization of the H.264/AVC Video Compression Standard.
CLEI Electron. J., 2010
Timing and interface communication analysis of H.264/AVC encoder using SystemC model.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010
A novel macroblock-level filtering upsampling architecture for H.264/AVC scalable extension.
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010
Variable block size motion estimation architecture with a fast bottom-up decision mode and an integrated motion compensation targeting the H.264/AVC video coding standard.
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010
A high performance hardware architecture for the H.264/AVC half-pixel motion estimation refinement.
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010
Proceedings of the 17th IEEE International Conference on Electronics, 2010
Proceedings of the 17th IEEE International Conference on Electronics, 2010
2009
Design of an interlayer deblocking filter architecture for H.264/SVC based on a novel sample-level filtering order.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2009
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009
Transforms and quantization design targeting the H.264/AVC intra prediction constraints.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009
Hardware Design of the H.264/AVC Variable Block Size Motion Estimation for Real-Time 1080HD Video Encoding.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009
A real time H.264/AVC intra frame prediction hardware architecture for HDTV 1080P video.
Proceedings of the 2009 IEEE International Conference on Multimedia and Expo, 2009
Low latency and high throughput dedicated loop of transforms and quantization focusing in the H.264/AVC Intra Prediction.
Proceedings of the International Conference on Image Processing, 2009
High throughput scalable Motion Compensation architecture for H.264/SVC video coding standard.
Proceedings of the 16th IEEE International Conference on Electronics, 2009
A multitransform architecture for the H.264/AVC standard and its design space exploration.
Proceedings of the 16th IEEE International Conference on Electronics, 2009
2008
High throughput architecture for H.264/AVC motion compensation sample interpolator for HDTV.
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008
Architectural design for the new QSDS with dynamic iteration control motion estimation algorithm targeting HDTV.
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
A high throughput and low cost diamond search architecture for HDTV motion estimation.
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008
2007
Microprocess. Microsystems, 2007
Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007
Proceedings of the Advances in Image and Video Technology, Second Pacific Rim Symposium, 2007
A Pipelined 8x8 2-D Forward DCT Hardware Architecture for H.264/AVC High Profile Encoder.
Proceedings of the Advances in Image and Video Technology, Second Pacific Rim Symposium, 2007
High Throughput Hardware Architecture for Motion Estimation with 4: 1 Pel Subsampling Targeting Digital Television Applications.
Proceedings of the Advances in Image and Video Technology, Second Pacific Rim Symposium, 2007
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
MoCHA: a Bi-Predictive Motion Compensation Hardware for H.264/AVC Decoder Targeting HDTV.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
High Throughput Architecture for Forward Transforms Module of H.264/AVC Video Coding Standard.
Proceedings of the 14th IEEE International Conference on Electronics, 2007
Proceedings of the FPL 2007, 2007
2006
Proceedings of the IFIP VLSI-SoC 2006, 2006
High throughput multitransform and multiparallelism IP for H.264/AVC video compression standard.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
2005
Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005
2004
Microelectron. Reliab., 2004
Project Space Exploration on the 2-D DCT Architecture of a JPEG Compressor Directed to FPGA Implementation.
Proceedings of the 2004 Design, 2004
2002
Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002
2001
Proceedings of the 14th Annual Symposium on Integrated Circuits and Systems Design, 2001
2000
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000
Using Reconfigurability Features to Break Down Test Costs: a Case Study.
Proceedings of the 1st Latin American Test Workshop, 2000