Lucas Klemmer
Orcid: 0000-0002-2571-1058
According to our database1,
Lucas Klemmer
authored at least 14 papers
between 2020 and 2024.
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Bibliography
2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2024
An Extensible and Flexible Methodology for Analyzing the Cache Performance of Hardware Designs.
Proceedings of the Forum on Specification & Design Languages, 2024
Using Formal Verification Methods for Optimization of Circuits Under External Constraints.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
2023
Programming Language Assisted Waveform Analysis: A Case Study on the Instruction Performance of SERV.
CoRR, 2023
Proceedings of the Forum on Specification & Design Languages, 2023
2022
An Exploration Platform for Microcoded RISC-V Cores leveraging the One Instruction Set Computer Principle.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
Proceedings of the Forum on Specification & Design Languages, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
WAL: A Novel Waveform Analysis Language for Advanced Design Understanding and Debugging.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022
2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021
2020
Proceedings of the 50th IEEE International Symposium on Multiple-Valued Logic, 2020