Lucas Deutschmann

Orcid: 0000-0002-2139-1878

According to our database1, Lucas Deutschmann authored at least 7 papers between 2022 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2024
A Scalable Formal Verification Methodology for Data-Oblivious Hardware.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2024

VeriCHERI: Exhaustive Formal Security Verification of CHERI at the RTL.
CoRR, 2024

Data-Oblivious and Performant: On Designing Security-Conscious Hardware.
Proceedings of the 25th IEEE Latin American Test Symposium, 2024

A Golden-Free Formal Method for Trojan Detection in Non-Interfering Accelerators.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

MCU-Wide Timing Side Channels and Their Detection.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
A New Security Threat in MCUs - SoC-wide timing side channels and how to find them.
CoRR, 2023

2022
Towards a formally verified hardware root-of-trust for data-oblivious computing.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022


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