Luca Zulberti

Orcid: 0000-0001-9599-2652

According to our database1, Luca Zulberti authored at least 11 papers between 2021 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

2021
2022
2023
2024
2025
0
1
2
3
4
5
1
1
1
2
4
1
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2025
Efficient Coarse-Grained Reconfigurable Array architecture for machine learning applications in space using DARE65T library platform.
Microprocess. Microsystems, 2025

2024
SmartDMA: Adaptable Memory Access Controller for CGRA-based Processing Systems.
Proceedings of the 27th Euromicro Conference on Digital System Design, 2024

Flexible Precision Vector Extension for Energy Efficient Coarse-Grained Reconfigurable Array AI-Engine.
Proceedings of the 27th Euromicro Conference on Digital System Design, 2024

2023
Enhanced Soft GPU Architecture for FPGAs.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

Exploiting FPGA Dynamic Partial Reconfiguration for a Soft GPU-based System-on-Chip.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

Cycle-Accurate Verification of the Cryptographic Co-Processor for the European Processor Initiative.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2023

A PUF-Based Secure Boot for RISC-V Architectures.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2023

2022
VLSI Design of Advanced-Features AES Cryptoprocessor in the Framework of the European Processor Initiative.
IEEE Trans. Very Large Scale Integr. Syst., 2022

Architectural Implications for Inference of Graph Neural Networks on CGRA-based Accelerators.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022

2021
A RISC-V Post Quantum Cryptography Instruction Set Extension for Number Theoretic Transform to Speed-Up CRYSTALS Algorithms.
IEEE Access, 2021

A Script-Based Cycle-True Verification Framework to Speed-Up Hardware and Software Co-Design of System-on-Chip exploiting RISC-V Architecture.
Proceedings of the 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2021


  Loading...