Luca Ramini
According to our database1,
Luca Ramini
authored at least 20 papers
between 2011 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
Implementing Optical Pass-Through Links via Photonics Crossbar Chip for HPC Applications.
Proceedings of the International Conference on Photonics in Switching and Computing, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2017
Contrasting Laser Power Requirements of Wavelength-Routed Optical NoC Topologies Subject to the Floorplanning, Placement, and Routing Constraints of a 3-D-Stacked System.
IEEE Trans. Very Large Scale Integr. Syst., 2017
A tool for synthesizing power-efficient and custom-tailored wavelength-routed optical rings.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
PROTON+: A Placement and Routing Tool for 3D Optical Networks-on-Chip with a Single Optical Layer.
ACM J. Emerg. Technol. Comput. Syst., 2016
Design technology for fault-free and maximally-parallel wavelength-routed optical networks-on-chip.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
Evolutionary vs. Revolutionary Interconnect Technologies for Future Low-Power Multi-Core Systems.
Proceedings of the 1st International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems, 2016
2015
Contrasting Power Efficiency of Contention Resolution vs. Avoidance Strategies in Optical Ring Interconnects for Photonically-Integrated Embedded Systems.
Proceedings of the Ninth International Workshop on Interconnection Network Architectures: On-Chip, 2015
Partitioning Strategies of Wavelength-Routed Optical Networks-on-Chip for Laser Power Minimization.
Proceedings of the 2015 Workshop on Exploiting Silicon Photonics for Energy-Efficient High Performance Computing, 2015
2014
Towards Compelling Cases for the Viability of Silicon-Nanophotonic Technology in Future Many-core Systems.
PhD thesis, 2014
Capturing the sensitivity of optical network quality metrics to its network interface parameters.
Concurr. Comput. Pract. Exp., 2014
Towards compelling cases for the viability of silicon-nanophotonic technology in future manycore systems.
Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014
Augmenting manycore programmable accelerators with photonic interconnect technology for the high-end embedded computing domain.
Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014
A complete electronic network interface architecture for global contention-free communication over emerging optical networks-on-chip.
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014
Assessing the energy break-even point between an optical NoC architecture and an aggressive electronic baseline.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Contrasting wavelength-routed optical NoC topologies for power-efficient 3D-stacked multicore processors using physical-layer analysis.
Proceedings of the Design, Automation and Test in Europe, 2013
2012
Engineering a Bandwidth-Scalable Optical Layer for a 3D Multi-core Processor with Awareness of Layout Constraints.
Proceedings of the 2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2012
Power efficiency of wavelength-routed optical NoC topologies for global connectivity of 3D multi-core processors.
Proceedings of the Fifth International Workshop on Network on Chip Architectures, 2012
2011
Abstract modelling of switching elements for optical networks-on-chip with technology platform awareness.
Proceedings of the Fifth International Workshop on Interconnection Network Architecture, 2011