Luca Giancane
Orcid: 0000-0002-7473-1055
According to our database1,
Luca Giancane
authored at least 15 papers
between 2006 and 2023.
Collaborative distances:
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Bibliography
2023
Proceedings of the 33rd IEEE International Workshop on Machine Learning for Signal Processing, 2023
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
Leakage Power Analysis attacks: Effectiveness on DPA resistant logic styles under process variations.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
Leakage Power Analysis Attacks: A Novel Class of Attacks to Nanometer Cryptographic Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the 16th IEEE International Conference on Electronics, 2009
Proceedings of the 16th IEEE International Conference on Electronics, 2009
2008
IET Circuits Devices Syst., 2008
A new dynamic differential logic style as a countermeasure to power analysis attacks.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
2007
A Dynamic and Differential CMOS Lookup Table with Data-Independent Power Consumption for Cryptographic Applications on Chip Cards.
IEEE Trans. Dependable Secur. Comput., 2007
A Statistical Model of Logic Gates for Monte Carlo Simulation Including On-Chip Variations.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007
2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the Cryptographic Hardware and Embedded Systems, 2006