Luca Colagrande
According to our database1,
Luca Colagrande
authored at least 4 papers
in 2024.
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Bibliography
2024
Occamy: A 432-Core 28.1 DP-GFLOP/s/W 83% FPU Utilization Dual-Chiplet, Dual-HBM2E RISC-V-based Accelerator for Stencil and Sparse Linear Algebra Computations with 8-to-64-bit Floating-Point Support in 12nm FinFET.
CoRR, 2024
Optimizing Foundation Model Inference on a Many-tiny-core Open-source RISC-V Platform.
CoRR, 2024
SARIS: Accelerating Stencil Computations on Energy-Efficient RISC-V Compute Clusters with Indirect Stream Registers.
CoRR, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024