Luca Benini
Orcid: 0000-0001-8068-3806Affiliations:
- University of Bologna, Italy
- ETH Zurich, Switzerland
- Università di Bologna, Italy (former)
According to our database1,
Luca Benini
authored at least 1,432 papers
between 1994 and 2024.
Collaborative distances:
Collaborative distances:
Awards
ACM Fellow
ACM Fellow 2016, "For contributions to the design of low power multi-processor systems".
IEEE Fellow
IEEE Fellow 2007, "For contributions to design technologies for low power design of integrated circuits and systems".
Timeline
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Online presence:
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Bibliography
2024
IEEE Trans. Computers, December, 2024
Deeploy: Enabling Energy-Efficient Deployment of Small Language Models on Heterogeneous Microcontrollers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2024
Distilling Tiny and Ultrafast Deep Neural Networks for Autonomous Navigation on Nano-UAVs.
IEEE Internet Things J., October, 2024
IEEE Internet Things J., October, 2024
Enabling Efficient Hybrid Systolic Computation in Shared-L1-Memory Manycore Clusters.
IEEE Trans. Very Large Scale Integr. Syst., September, 2024
sEMG-Driven Hand Dynamics Estimation With Incremental Online Learning on a Parallel Ultra-Low-Power Microcontroller.
IEEE Trans. Biomed. Circuits Syst., August, 2024
Real-Time Motor Unit Tracking From sEMG Signals With Adaptive ICA on a Parallel Ultra-Low Power Processor.
IEEE Trans. Biomed. Circuits Syst., August, 2024
BrainFuseNet: Enhancing Wearable Seizure Detection Through EEG-PPG-Accelerometer Sensor Fusion and Efficient Edge Deployment.
IEEE Trans. Biomed. Circuits Syst., August, 2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., July, 2024
Ara2: Exploring Single- and Multi-Core Vector Processing With an Efficient RVV 1.0 Compliant Open-Source Processor.
IEEE Trans. Computers, July, 2024
Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality With At-MRAM Neural Engine.
IEEE J. Solid State Circuits, July, 2024
IEEE Trans. Very Large Scale Integr. Syst., June, 2024
Reducing False Alarms in Wearable Seizure Detection With EEGformer: A Compact Transformer Model for MCUs.
IEEE Trans. Biomed. Circuits Syst., June, 2024
IEEE Internet Things J., June, 2024
IEEE Trans. Circuits Syst. I Regul. Pap., May, 2024
IEEE Internet Things J., April, 2024
ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation.
Int. J. Parallel Program., April, 2024
IEEE Trans. Computers, January, 2024
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2-8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing.
IEEE J. Solid State Circuits, January, 2024
Self-Sustaining Ultrawideband Positioning System for Event-Driven Indoor Localization.
IEEE Internet Things J., January, 2024
A Muscle Pennation Angle Estimation Framework From Raw Ultrasound Data for Wearable Biomedical Instrumentation.
IEEE Trans. Instrum. Meas., 2024
Enhancing Neural Architecture Search With Multiple Hardware Constraints for Deep Learning Model Deployment on Tiny IoT Devices.
IEEE Trans. Emerg. Top. Comput., 2024
IEEE Trans. Emerg. Top. Comput., 2024
Future Gener. Comput. Syst., 2024
CoRR, 2024
CoRR, 2024
ControlPULPlet: A Flexible Real-time Multi-core RISC-V Controller for 2.5D Systems-in-package.
CoRR, 2024
Circuits and Systems for Embodied AI: Exploring uJ Multi-Modal Perception for Nano-UAVs on the Kraken Shield.
CoRR, 2024
vCLIC: Towards Fast Interrupt Handling in Virtualized RISC-V Mixed-criticality Systems.
CoRR, 2024
When SAM2 Meets Video Camouflaged Object Segmentation: A Comprehensive Evaluation and Adaptation.
CoRR, 2024
CoRR, 2024
Train-On-Request: An On-Device Continual Learning Workflow for Adaptive Real-World Brain Machine Interfaces.
CoRR, 2024
fence.t.s: Closing Timing Channels in High-Performance Out-of-Order Cores through ISA-Supported Temporal Partitioning.
CoRR, 2024
Optimization and Deployment of Deep Neural Networks for PPG-based Blood Pressure Estimation Targeting Low-power Wearables.
CoRR, 2024
A 1024 RV-Cores Shared-L1 Cluster with High Bandwidth Memory Link for Low-Latency 6G-SDR.
CoRR, 2024
Toward Attention-based TinyML: A Heterogeneous Accelerated Architecture and Automated Deployment Flow.
CoRR, 2024
Culsans: An Efficient Snoop-based Coherency Unit for the CVA6 Open Source RISC-V application processor.
CoRR, 2024
GAP9Shield: A 150GOPS AI-capable Ultra-low Power Module for Vision and Ranging Applications on Nano-drones.
CoRR, 2024
Distilling Tiny and Ultra-fast Deep Neural Networks for Autonomous Navigation on Nano-UAVs.
CoRR, 2024
Design and Experimental Investigation of Trikarenos: A Fault-Tolerant 28nm RISC-V-based SoC.
CoRR, 2024
CoRR, 2024
Low Latency Visual Inertial Odometry with On-Sensor Accelerated Optical Flow for Resource-Constrained UAVs.
CoRR, 2024
GAPses: Versatile smart glasses for comfortable and fully-dry acquisition and parallel ultra-low-power processing of EEG and EOG.
CoRR, 2024
CoRR, 2024
Optimizing Foundation Model Inference on a Many-tiny-core Open-source RISC-V Platform.
CoRR, 2024
xTern: Energy-Efficient Ternary Neural Network Inference on RISC-V-Based Edge Systems.
CoRR, 2024
Modeling and Controlling Many-Core HPC Processors: an Alternative to PID and Moving Average Algorithms.
CoRR, 2024
CoRR, 2024
CoRR, 2024
Insights from Basilisk: Are Open-Source EDA Tools Ready for a Multi-Million-Gate, Linux-Booting RV64 SoC Design?
CoRR, 2024
Basilisk: Achieving Competitive Performance with Open EDA Tools on an Open-Source Linux-Capable RISC-V SoC.
CoRR, 2024
BatDeck: Advancing Nano-drone Navigation with Low-power Ultrasound-based Obstacle Avoidance.
CoRR, 2024
CoRR, 2024
CoRR, 2024
SzCORE: A Seizure Community Open-source Research Evaluation framework for the validation of EEG-based automated seizure detection algorithms.
CoRR, 2024
A Noisy Beat is Worth 16 Words: a Tiny Transformer for Low-Power Arrhythmia Classification on Microcontrollers.
CoRR, 2024
Data-Driven Power Modeling and Monitoring via Hardware Performance Counters Tracking.
CoRR, 2024
An Extreme-Edge TCN-Based Low-Latency Collision-Avoidance Safety System for Industrial Machinery.
IEEE Access, 2024
Flexible and Fully Quantized Lightweight TinyissimoYOLO for Ultra-Low-Power Edge Systems.
IEEE Access, 2024
Dataset, 2024
Proceedings of the Companion of the 15th ACM/SPEC International Conference on Performance Engineering, 2024
Occamy: A 432-Core 28.1 DP-GFLOP/s/W 83% FPU Utilization Dual-Chiplet, Dual-HBM2E RISC-V-Based Accelerator for Stencil and Sparse Linear Algebra Computations with 8-to-64-bit Floating-Point Support in 12nm FinFET.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Proceedings of the 2024 USENIX Annual Technical Conference, 2024
Compressed Latent Replays for Lightweight Continual Learning on Spiking Neural Networks.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024
A Precision-Optimized Fixed-Point Near-Memory Digital Processing Unit for Analog In-Memory Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
3D Partitioning with Pipeline Optimization for Low-Latency Memory Access in Many-Core SoCs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Fully Onboard Low-Power Localization with Semantic Sensor Fusion on a Nano-UAV using Floor Plans.
Proceedings of the IEEE International Conference on Robotics and Automation, 2024
TeraPool-SDR: An 1.89TOPS 1024 RV-Cores 4MiB Shared-L1 Cluster for Next-Generation Open-Source Software-Defined Radios.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024
Proceedings of the 46th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2024
Leveraging Motor Unit Spatial Activation Patterns for Channel Selection in Finger Force Regression.
Proceedings of the 46th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2024
Near-Memory Parallel Indexing and Coalescing: Enabling Highly Efficient Indirect Access for SpMV.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
LRSCwait: Enabling Scalable and Efficient Synchronization in Manycore Systems Through Polling-Free and Retry-Free Operation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
MX: Enhancing RISC-V's Vector ISA for Ultra-Low Overhead, Energy-Efficient Matrix Multiplication.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
PELS: A Lightweight and Flexible Peripheral Event Linking System for Ultra-Low Power IoT Processors.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
AXI-REALM: A Lightweight and Modular Interconnect Extension for Traffic Regulation and Monitoring of Heterogeneous Real-Time SoCs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
SARIS: Accelerating Stencil Computations on Energy-Efficient RISC-V Compute Clusters with Indirect Stream Registers.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
Structured Sparse Back-propagation for Lightweight On-Device Continual Learning on Microcontroller Units.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2024
Multi-resolution Rescored ByteTrack for Video Object Detection on Ultra-low-power Embedded Systems.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2024
NARS: Neuromorphic Acceleration through Register-Streaming Extensions on RISC-V Cores.
Proceedings of the 21st ACM International Conference on Computing Frontiers, 2024
A Gigabit, DMA-enhanced Open-Source Ethernet Controller for Mixed-Criticality Systems.
Proceedings of the 21st ACM International Conference on Computing Frontiers, 2024
Spatzformer: An Efficient Reconfigurable Dual-Core RISC-V V Cluster for Mixed Scalar-Vector Workloads.
Proceedings of the 35th IEEE International Conference on Application-specific Systems, 2024
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024
On-Device Domain Learning for Keyword Spotting on Low-Power Extreme Edge Embedded Systems.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024
2023
Robust and Efficient Depth-Based Obstacle Avoidance for Autonomous Miniaturized UAVs.
IEEE Trans. Robotics, December, 2023
Sparse Stream Semantic Registers: A Lightweight ISA Extension Accelerating General Sparse Linear Algebra.
IEEE Trans. Parallel Distributed Syst., December, 2023
IEEE Trans. Computers, December, 2023
Directly-trained Spiking Neural Networks for Deep Reinforcement Learning: Energy efficient implementation of event-based obstacle avoidance on a neuromorphic accelerator.
Neurocomputing, December, 2023
RedMule: A mixed-precision matrix-matrix operation engine for flexible and energy-efficient on-chip linear algebra and TinyML training acceleration.
Future Gener. Comput. Syst., December, 2023
7 μJ/inference end-to-end gesture recognition from dynamic vision sensor data using ternarized hybrid convolutional neural networks.
Future Gener. Comput. Syst., December, 2023
Reduced precision floating-point optimization for Deep Neural Network On-Device Learning on microcontrollers.
Future Gener. Comput. Syst., December, 2023
IEEE Des. Test, December, 2023
CVA6 RISC-V Virtualization: Architecture, Microarchitecture, and Design Space Exploration.
IEEE Trans. Very Large Scale Integr. Syst., November, 2023
Yun: An Open-Source, 64-Bit RISC-V-Based Vector Processor With Multi-Precision Integer and Floating-Point Support in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, October, 2023
Cheshire: A Lightweight, Linux-Capable RISC-V Host Platform for Domain-Specific Accelerator Plug-In.
IEEE Trans. Circuits Syst. II Express Briefs, October, 2023
Dataset, October, 2023
IEEE Trans. Computers, May, 2023
IEEE Trans. Very Large Scale Integr. Syst., April, 2023
Nat. Mac. Intell., April, 2023
Energy-Efficient, Precise UWB-Based 3-D Localization of Sensor Nodes With a Nano-UAV.
IEEE Internet Things J., April, 2023
Future Gener. Comput. Syst., April, 2023
Dataset, April, 2023
Lightweight Neural Architecture Search for Temporal Convolutional Networks at the Edge.
IEEE Trans. Computers, March, 2023
Reducing the Energy Consumption of sEMG-Based Gesture Recognition at the Edge Using Transformers and Dynamic Inference.
Sensors, February, 2023
Raw data related to In-memory factorization of holographic perceptual representations.
Dataset, February, 2023
IEEE Trans. Instrum. Meas., 2023
DNN Is Not All You Need: Parallelizing Non-neural ML Algorithms on Ultra-low-power IoT Processors.
ACM Trans. Embed. Comput. Syst., 2023
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode.
IEEE Trans. Circuits Syst. I Regul. Pap., 2023
TCN-CUTIE: A 1, 036-TOp/s/W, 2.72-µJ/Inference, 12.2-mW All-Digital Ternary Accelerator in 22-nm FDX Technology.
IEEE Micro, 2023
TCNCA: Temporal Convolution Network with Chunked Attention for Scalable Sequence Processing.
CoRR, 2023
A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures.
CoRR, 2023
Stella Nera: Achieving 161 TOp/s/W with Multiplier-free DNN Acceleration based on Approximate Matrix Multiplication.
CoRR, 2023
Ara2: Exploring Single- and Multi-Core Vector Processing with an Efficient RVV1.0 Compliant Open-Source Processor.
CoRR, 2023
RapidChiplet: A Toolchain for Rapid Design Space Exploration of Chiplet Architectures.
CoRR, 2023
Ultra-Efficient On-Device Object Detection on AI-Integrated Smart Glasses with TinyissimoYOLO.
CoRR, 2023
Spatz: Clustering Compact RISC-V-Based Vector Units to Maximize Computing Efficiency.
CoRR, 2023
A Wearable Ultra-Low-Power sEMG-Triggered Ultrasound System for Long-Term Muscle Activity Monitoring.
CoRR, 2023
CoRR, 2023
Flexible and Fully Quantized Ultra-Lightweight TinyissimoYOLO for Ultra-Low-Power Edge Systems.
CoRR, 2023
Design of an energy aware petaflops class high performance cluster based on power architecture.
CoRR, 2023
CoRR, 2023
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasing.
CoRR, 2023
Echoes: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays.
CoRR, 2023
DARKSIDE: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training.
CoRR, 2023
Hybrid Modular Redundancy: Exploring Modular Redundancy Approaches in RISC-V Multi-Core Computing Clusters for Reliable Processing in Space.
CoRR, 2023
Experimenting with Emerging ARM and RISC-V Systems for Decentralised Machine Learning.
CoRR, 2023
A Self-Sustainable and Micro-Second Time Synchronized Multi-Node Wireless System for Aerodynamic Monitoring on Wind Turbines.
IEEE Access, 2023
Securing Tiny Transformer-Based Computer Vision Models: Evaluating Real-World Patch Attacks.
Proceedings of the 9th IEEE World Forum on Internet of Things, 2023
Improving Data-Scarce Image Classification Through Multimodal Synthetic Data Pretraining.
Proceedings of the IEEE Sensors Applications Symposium, 2023
Fast Shared-Memory Barrier Synchronization for a 1024-Cores RISC-V Many-Core Cluster.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2023
MIMONets: Multiple-Input-Multiple-Output Neural Networks Exploiting Computation in Superposition.
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023
Proceedings of the 17th International Workshop on Neural-Symbolic Learning and Reasoning, 2023
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023
Proceedings of the 12th Mediterranean Conference on Embedded Computing, 2023
Event-based Low-Power and Low-Latency Regression Method for Hand Kinematics from Surface EMG.
Proceedings of the 9th International Workshop on Advances in Sensors and Interfaces, 2023
Proceedings of the 9th International Workshop on Advances in Sensors and Interfaces, 2023
Design and Evaluation of a LoRa Controlled Rugged Multisensor Unit for Induced Rockfall Experiments.
Proceedings of the 9th International Workshop on Advances in Sensors and Interfaces, 2023
Proceedings of the 9th International Workshop on Advances in Sensors and Interfaces, 2023
ColibriUAV: An Ultra-Fast, Energy-Efficient Neuromorphic Edge Processing UAV-Platform with Event-Based and Frame-Based Cameras.
Proceedings of the 9th International Workshop on Advances in Sensors and Interfaces, 2023
Proceedings of the 9th International Workshop on Advances in Sensors and Interfaces, 2023
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023
A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
Precision-aware Latency and Energy Balancing on Multi-Accelerator Platforms for DNN Inference.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
ITA: An Energy-Efficient Attention and Softmax Accelerator for Quantized Transformers.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I<sup>2</sup>S DSP for Flexible Data Acquisition from Microphone Arrays.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
ColibriES: A Milliwatts RISC-V Based Embedded System Leveraging Neuromorphic and Neural Networks Hardware Accelerators for Low-Latency Closed-loop Control Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
A Relative Infrastructure-less Localization Algorithm for Decentralized and Autonomous Swarm Formation.
IROS, 2023
Quantitative Evaluation of a Multi-Modal Camera Setup for Fusing Event Data with RGB Images.
Proceedings of the 2023 IEEE SENSORS, Vienna, Austria, October 29 - Nov. 1, 2023, 2023
Deep Neural Network Architecture Search for Accurate Visual Pose Estimation aboard Nano-UAVs.
Proceedings of the IEEE International Conference on Robotics and Automation, 2023
Learning continuous piecewise non-linear activation functions for deep neural networks.
Proceedings of the IEEE International Conference on Multimedia and Expo, 2023
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023
MinPool: A 16-core NUMA-L1 Memory RISC-V Processor Cluster for Always-on Image Processing in 65nm CMOS.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023
Proceedings of the 35th IEEE Hot Chips Symposium, 2023
Proceedings of the IEEE European Test Symposium, 2023
Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
Reducing Load-Use Dependency-Induced Performance Penalty in the Open-Source RISC-V CVA6 CPU.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023
Land & Localize: An Infrastructure-free and Scalable Nano-Drones Swarm with UWB-based Localization.
Proceedings of the 19th International Conference on Distributed Computing in Smart Systems and the Internet of Things, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
MemPool Meets Systolic: Flexible Systolic Computation in a Large Shared-Memory Processor Cluster.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Fully On-board Low-Power Localization with Multizone Time-of-Flight Sensors on Nano-UAVs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
TransLib: A Library to Explore Transprecision Floating-Point Arithmetic on Multi-Core IoT End-Nodes.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Bio-inspired Autonomous Exploration Policies with CNN-based Object Detection on Nano-drones.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
An Ultra-Low-Power Serial Implementation for Sigmoid and Tanh Using CORDIC Algorithm.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Energy-efficient Wearable-to-Mobile Offload of ML Inference for PPG-based Heart-Rate Estimation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Specialization meets Flexibility: a Heterogeneous Architecture for High-Efficiency, High-flexibility AR/VR Processing.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023
BioGAP: a 10-Core FP-capable Ultra-Low Power IoT Processor, with Medical-Grade AFE and BLE Connectivity for Wearable Biosignal Processing.
Proceedings of the IEEE International Conference on Omni-layer Intelligent Systems, 2023
Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023
Proceedings of the International Conference on Compilers, 2023
Online Unsupervised Arm Posture Adaptation for sEMG-based Gesture Recognition on a Parallel Ultra-Low-Power Microcontroller.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023
Enhancing Performance, Calibration Time and Efficiency in Brain-Machine Interfaces through Transfer Learning and Wearable EEG Technology.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023
Skilog: A Smart Sensor System for Performance Analysis and Biofeedback in Ski Jumping.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023
An Adaptive Dynamic Mixing Model for sEMG Real-Time ICA on an Ultra-Low Power Processor.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023
Towards a Novel Ultrasound System Based on Low-Frequency Feature Extraction From a Fully-Printed Flexible Transducer.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023
Free Bits: Latency Optimization of Mixed-Precision Quantized Neural Networks on the Edge.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
Embedded neuromorphic attention model leveraging a novel low-power heterogeneous platform.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
2022
ACM Trans. Embed. Comput. Syst., September, 2022
Dataflow Driven Partitioning of Machine Learning Applications for Optimal Energy Use in Batteryless Systems.
ACM Trans. Embed. Comput. Syst., September, 2022
A Low-Power Transprecision Floating-Point Cluster for Efficient Near-Sensor Data Analytics.
IEEE Trans. Parallel Distributed Syst., 2022
IEEE Trans. Parallel Distributed Syst., 2022
Leveraging Tactile Sensors for Low Latency Embedded Smart Hands for Prosthetic and Robotic Applications.
IEEE Trans. Instrum. Meas., 2022
Trimming Feature Extraction and Inference for MCU-Based Edge NILM: A Systematic Approach.
IEEE Trans. Ind. Informatics, 2022
Vau Da Muntanialas: Energy-Efficient Multi-Die Scalable Acceleration of RNN Inference.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Sub-mW Keyword Spotting on an MCU: Analog Binary Feature Extraction and Binary Neural Networks.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
CUTIE: Beyond PetaOp/s/W Ternary DNN Inference Acceleration With Better-Than-Binary Energy Efficiency.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
IEEE Trans. Computers, 2022
Sustain. Comput. Informatics Syst., 2022
Fly, Wake-up, Find: UAV-based Energy-efficient Localization for Distributed Sensor Nodes.
Sustain. Comput. Informatics Syst., 2022
Traffic Load Estimation from Structural Health Monitoring sensors using supervised learning.
Sustain. Comput. Informatics Syst., 2022
Efficient Low-Frequency SSVEP Detection with Wearable EEG Using Normalized Canonical Correlation Analysis.
Sensors, 2022
Vega: A Ten-Core SoC for IoT Endnodes With DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode.
IEEE J. Solid State Circuits, 2022
Fully Onboard AI-Powered Human-Drone Pose Estimation on Ultralow-Power Autonomous Flying Nano-UAVs.
IEEE Internet Things J., 2022
Exploring Scalable, Distributed Real-Time Anomaly Detection for Bridge Health Monitoring.
IEEE Internet Things J., 2022
Embedding Temporal Convolutional Networks for Energy-efficient PPG-based Heart Rate Monitoring.
ACM Trans. Comput. Heal., 2022
A Heterogeneous In-Memory Computing Cluster for Flexible End-to-End Inference of Real-World Deep Neural Networks.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2022
Self-sustaining Ultra-wideband Positioning System for Event-driven Indoor Localization.
CoRR, 2022
TCN-CUTIE: A 1036 TOp/s/W, 2.72 uJ/Inference, 12.2 mW All-Digital Ternary Accelerator in 22 nm FDX Technology.
CoRR, 2022
Aerosense: A Self-Sustainable And Long-Range Bluetooth Wireless Sensor Node for Aerodynamic and Aeroacoustic Monitoring on Wind Turbines.
CoRR, 2022
WideVision: A Low-Power, Multi-Protocol Wireless Vision Platform for Distributed Surveillance.
Proceedings of the 18th International Conference on Wireless and Mobile Computing, 2022
An Optimized Heart Rate Detection System Based on Low-Power Microcontroller Platforms for Biosignal Processing.
Proceedings of the Advances in System-Integrated Intelligence, 2022
Proceedings of the High Performance Computing. ISC High Performance 2022 International Workshops - Hamburg, Germany, May 29, 2022
Monte Cimone: Paving the Road for the First Generation of RISC-V High-Performance Computers.
Proceedings of the 35th IEEE International System-on-Chip Conference, 2022
Proceedings of the IEEE Sensors Applications Symposium, 2022
Towards the Future Generation of Railway Localization and Signaling Exploiting sub-meter RTK GNSS.
Proceedings of the IEEE Sensors Applications Symposium, 2022
ControlPULP: A RISC-V Power Controller for HPC Processors with Parallel Control-Law Computation Acceleration.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022
PULP-TrainLib: Enabling On-Device Training for RISC-V Multi-core MCUs Through Performance-Driven Autotuning.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022
A Data-Driven Approach to Lightweight DVFS-Aware Counter-Based Power Modeling for Heterogeneous Platforms.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022
Proceedings of the 11th Mediterranean Conference on Embedded Computing, 2022
On-Demand Redundancy Grouping: Selectable Soft-Error Tolerance for a Multicore Cluster.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
Soft Tiles: Capturing Physical Implementation Flexibility for Tightly-Coupled Parallel Processing Clusters.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
Multi-Complexity-Loss DNAS for Energy-Efficient and Memory-Constrained Deep Neural Networks.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022
Parallelizing Optical Flow Estimation on an Ultra-Low Power RISC-V Cluster for Nano-UAV Navigation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the 21st ACM/IEEE International Conference on Information Processing in Sensor Networks, 2022
Spatz: A Compact Vector Processing Unit for High-Performance and Energy-Efficient Shared-L1 Clusters.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Towards a Multi-Pixel Time-of-Flight Indoor Navigation System for Nano-Drone Applications.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2022
Kraken: A Direct Event/Frame-Based Multi-sensor Fusion SoC for Ultra-Efficient Visual Processing in Nano-UAVs.
Proceedings of the 2022 IEEE Hot Chips 34 Symposium, 2022
Proceedings of the 13th IEEE International Green and Sustainable Computing Conference, 2022
ViT-LR: Pushing the Envelope for Transformer-Based on-Device Embedded Continual Learning.
Proceedings of the 13th IEEE International Green and Sustainable Computing Conference, 2022
Proceedings of the Euro-Par 2022: Parallel Processing Workshops, 2022
Analysing Supercomputer Nodes Behaviour with the Latent Representation of Deep Learning Models.
Proceedings of the Euro-Par 2022: Parallel Processing, 2022
In-memory Realization of In-situ Few-shot Continual Learning with a Dynamically Evolving Explicit Memory.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
A 283 pJ/b 240 Mb/s Floating-Point Baseband Accelerator for Massive MU-MIMO in 22FDX.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
AEPUS: a tool for the Automated Extraction of Pennation angles in Ultrasound images with low Signal-to-noise ratio for plane-wave imaging.
Proceedings of the 44th Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2022
Proceedings of the 44th Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2022
A Wireless System for EEG Acquisition and Processing in an Earbud Form Factor with 600 Hours Battery Lifetime.
Proceedings of the 44th Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2022
BioWolf16: a 16-channel, 24-bit, 4kSPS Ultra-Low Power Platform for Wearable Clinical-grade Bio-potential Parallel Processing and Streaming.
Proceedings of the 44th Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2022
RedMulE: A Compact FP16 Matrix-Multiplication Accelerator for Adaptive Deep Learning on RISC-V-Based Ultra-Low-Power SoCs.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
Ternarized TCN for $\mu \mathrm{J}/\text{Inference}$ Gesture Recognition from DVS Event Frames.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
Bioformers: Embedding Transformers for Ultra-Low Power sEMG-based Gesture Recognition.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
Training Quantised Neural Networks with STE Variants: the Additive Noise Annealing Algorithm.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2022
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2022
A 1036 TOp/s/W, 12.2 mW, 2.72 μJ/Inference All Digital TNN Accelerator in 22 nm FDX Technology for TinyML Applications.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2022
Proceedings of the CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17, 2022
Reducing neural architecture search spaces with training-free statistics and computational graph clustering.
Proceedings of the CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17, 2022
Proceedings of the CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17, 2022
Proceedings of the CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17, 2022
Proceedings of the IEEE Conference on Control Technology and Applications, 2022
sEMG Neural Spikes Reconstruction for Gesture Recognition on a Low-Power Multicore Processor.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022
EEGformer: Transformer-Based Epilepsy Detection on Raw EEG Traces for Low-Channel-Count Wearable Continuous Monitoring Devices.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022
A "New Ara" for Vector Computing: An Open Source Highly Efficient RISC-V V 1.0 Vector Processor Design.
Proceedings of the 33rd IEEE International Conference on Application-specific Systems, 2022
MiniFloat-NN and ExSdotp: An ISA Extension and a Modular Open Hardware Unit for Low-Precision Training on RISC-V Cores.
Proceedings of the 29th IEEE Symposium on Computer Arithmetic, 2022
An Energy-Efficient Spiking Neural Network for Finger Velocity Decoding for Implantable Brain-Machine Interface.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
Tiny-PULP-Dronets: Squeezing Neural Networks for Faster and Lighter Inference on Multi-Tasking Autonomous Nano-Drones.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
Adversarially-Trained Tiny Autoencoders for Near-Sensor Continuous Structural Health Monitoring.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
Efficient image dataset classification difficulty estimation for predicting deep-learning accuracy.
Vis. Comput., 2021
IEEE Trans. Very Large Scale Integr. Syst., 2021
IEEE Trans. Very Large Scale Integr. Syst., 2021
A Fully Integrated 5-mW, 0.8-Gbps Energy-Efficient Chip-to-Chip Data Link for Ultralow-Power IoT End-Nodes in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2021
FPnew: An Open-Source Multiformat Floating-Point Unit Architecture for Energy-Proportional Transprecision Computing.
IEEE Trans. Very Large Scale Integr. Syst., 2021
An SRAM-Based Multibit In-Memory Matrix-Vector Multiplier With a Precision That Scales Linearly in Area, Time, and Power.
IEEE Trans. Very Large Scale Integr. Syst., 2021
IEEE Trans. Sustain. Comput., 2021
Energy-Efficient Hardware-Accelerated Synchronization for Shared-L1-Memory Multiprocessor Clusters.
IEEE Trans. Parallel Distributed Syst., 2021
IEEE Trans. Medical Imaging, 2021
An Ensemble of Hyperdimensional Classifiers: Hardware-Friendly Short-Latency Seizure Detection With Automatic iEEG Electrode Selection.
IEEE J. Biomed. Health Informatics, 2021
RTK-LoRa: High-Precision, Long-Range, and Energy-Efficient Localization for Mobile IoT Devices.
IEEE Trans. Instrum. Meas., 2021
IEEE Trans. Instrum. Meas., 2021
XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Networks on RISC-V Based IoT End Nodes.
IEEE Trans. Emerg. Top. Comput., 2021
The Predictable Execution Model in Practice: Compiling Real Applications for COTS Hardware.
ACM Trans. Embed. Comput. Syst., 2021
Energy Efficient In-Memory Hyperdimensional Encoding for Spatio-Temporal Signal Processing.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
A 5 μW Standard Cell Memory-Based Configurable Hyperdimensional Computing Accelerator for Always-on Smart Sensing.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Automated Design Space Exploration for Optimized Deployment of DNN on Arm Cortex-A CPUs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Snitch: A Tiny Pseudo Dual-Issue Processor for Area and Energy Efficient Execution of Floating-Point Intensive Workloads.
IEEE Trans. Computers, 2021
Stream Semantic Registers: A Lightweight RISC-V ISA Extension Achieving Full Compute Utilization in Single-Issue Cores.
IEEE Trans. Computers, 2021
IEEE Trans. Computers, 2021
Efficient Pipelined Execution of CNNs Based on In-Memory Computing and Graph Homomorphism Verification.
IEEE Trans. Computers, 2021
COUNTDOWN: A Run-Time Library for Performance-Neutral Energy Saving in MPI Applications.
IEEE Trans. Computers, 2021
IEEE Trans. Computers, 2021
Sub-100 $\mu$W Multispectral Riemannian Classification for EEG-Based Brain-Machine Interfaces.
IEEE Trans. Biomed. Circuits Syst., 2021
Energy-Positive Activity Recognition - From Kinetic Energy Harvesting to Smart Self-Sustainable Wearable Devices.
IEEE Trans. Biomed. Circuits Syst., 2021
IEEE Trans. Biomed. Circuits Syst., 2021
Sensors, 2021
RF-Powered Low-Energy Sensor Nodes for Predictive Maintenance in Electromagnetically Harsh Industrial Environments.
Sensors, 2021
Manticore: A 4096-Core RISC-V Chiplet Architecture for Ultraefficient Floating-Point Computing.
IEEE Micro, 2021
TinyRadarNN: Combining Spatial and Temporal Convolutional Neural Networks for Embedded Gesture Recognition With Short Range Radars.
IEEE Internet Things J., 2021
Embedded Streaming Principal Components Analysis for Network Load Reduction in Structural Health Monitoring.
IEEE Internet Things J., 2021
Frontiers Comput. Neurosci., 2021
IEEE J. Emerg. Sel. Topics Circuits Syst., 2021
Improving Autonomous Nano-Drones Performance via Automated End-to-End Optimization and Deployment of DNNs.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2021
IEEE Embed. Syst. Lett., 2021
IEEE Embed. Syst. Lett., 2021
Enabling Design Methodologies and Future Trends for Edge AI: Specialization and Codesign.
IEEE Des. Test, 2021
Vega: A 10-Core SoC for IoT End-Nodes with DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode.
CoRR, 2021
A Fully-Integrated 5mW, 0.8Gbps Energy-Efficient Chip-to-Chip Data Link for Ultra-Low-Power IoT End-Nodes in 65-nm CMOS.
CoRR, 2021
Memory-Aware Partitioning of Machine Learning Applications for Optimal Energy Use in Batteryless Systems.
CoRR, 2021
CoRR, 2021
CoRR, 2021
Enabling Design Methodologies and Future Trends for Edge AI: Specialization and Co-design.
CoRR, 2021
Fully Onboard AI-powered Human-Drone Pose Estimation on Ultra-low Power Autonomous Flying Nano-UAVs.
CoRR, 2021
DiG: enabling out-of-band scalable high-resolution monitoring for data-center analytics, automation and control (extended).
Clust. Comput., 2021
Near-channel classifier: symbiotic communication and classification in high-dimensional space.
Brain Informatics, 2021
A Sub-mW Dual-Engine ML Inference System-on-Chip for Complete End-to-End Face-Analysis at the Edge.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
Hardware-In-The Loop Emulation for Agile Co-Design of Parallel Ultra-Low Power IoT Processors.
Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021
Low-Overhead Early-Stopping Policies for Efficient Random Forests Inference on Microcontrollers.
Proceedings of the VLSI-SoC: Technology Advancement on SoC Design, 2021
Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021
RVfplib: A Fast and Compact Open-Source Floating-Point Emulation Library for Tiny RISC-V Processors.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2021
Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021
4.4 A 1.3TOPS/W @ 32GOPS Fully Integrated 10-Core SoC for IoT End-Nodes with 1.7μW Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
F1: Striking the Balance Between Energy Efficiency & Flexibility: General-Purpose vs Special-Purpose ML Processors.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
SE2: Going Remote: Challenges and Opportunities to Remote Learning, Work, and Collaboration.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
Mixed-Precision Quantization and Parallel Implementation of Multispectral Riemannian Classification for Brain-Machine Interfaces.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
H-Watch: An Open, Connected Platform for AI-Enhanced COVID19 Infection Symptoms Monitoring and Contact Tracing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Low-Power License Plate Detection and Recognition on a RISC-V Multi-Core MCU-Based Vision System.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
A RISC-V in-network accelerator for flexible high-performance low-power packet processing.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
WindNode: A Long-Lasting And Long-Range Bluetooth Wireless Sensor Node for Pressure and Acoustic Monitoring on Wind Turbines.
Proceedings of the 4th IEEE International Conference on Industrial Cyber-Physical Systems, 2021
GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Towards Always-on Event-based Cameras for Long-lasting Battery-operated Smart Sensor Nodes.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2021
Model-based vs. Data-driven Approaches for Anomaly Detection in Structural Health Monitoring: a Case Study.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2021
A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode.
Proceedings of the 47th ESSCIRC 2021, 2021
A 10-core SoC with 20 Fine-Grain Power Domains for Energy-Proportional Data-Parallel Processing over a Wide Voltage and Temperature Range.
Proceedings of the 47th ESSCIRC 2021, 2021
UStEMG: an Ultrasound Transparent Tattoo-based sEMG System for Unobtrusive Parallel Acquisitions of Muscle Electro-mechanics.
Proceedings of the 43rd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2021
Microarchitectural Timing Channels and their Prevention on an Open-Source 64-bit RISC-V Core.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Indirection Stream Semantic Register Architecture for Efficient Sparse-Dense Linear Algebra.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Analyzing Memory Interference of FPGA Accelerators on Multicore Hosts in Heterogeneous Reconfigurable SoCs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
RISC-V for Real-time MCUs - Software Optimization and Microarchitectural Gap Analysis.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Prediction of Thermal Hazards in a Real Datacenter Room Using Temporal Convolutional Networks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Pruning In Time (PIT): A Lightweight Network Architecture Optimizer for Temporal Convolutional Networks.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
sEMG-based Regression of Hand Kinematics with Temporal Convolutional Networks on a Low-Power Edge Microcontroller.
Proceedings of the 2021 IEEE International Conference on Omni-Layer Intelligent Systems, 2021
A Microcontroller is All You Need: Enabling Transformer Execution on Low-Power IoT Endnodes.
Proceedings of the 2021 IEEE International Conference on Omni-Layer Intelligent Systems, 2021
Proceedings of the IEEE Biomedical Circuits and Systems Conference, BioCAS 2021, 2021
To Buffer, or Not to Buffer? A Case Study on FFT Accelerators for Ultra-Low-Power Multicore Clusters.
Proceedings of the 32nd IEEE International Conference on Application-specific Systems, 2021
Proceedings of the Architecture of Computing Systems - 34th International Conference, 2021
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
ECG-TCN: Wearable Cardiac Arrhythmia Detection with a Temporal Convolutional Network.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
2020
Ara: A 1-GHz+ Scalable and Energy-Efficient RISC-V Vector Processor With Multiprecision Floating-Point Support in 22-nm FD-SOI.
IEEE Trans. Very Large Scale Integr. Syst., 2020
Countdown Slack: A Run-Time Library to Reduce Energy Footprint in Large-Scale MPI Applications.
IEEE Trans. Parallel Distributed Syst., 2020
Bonseyes AI Pipeline - Bringing AI to You: End-to-end integration of data, algorithms, and deployment tools.
ACM Trans. Internet Things, 2020
BrightNet: A Deep CNN for OLED-Based Point of Care Immunofluorescent Diagnostic Systems.
IEEE Trans. Instrum. Meas., 2020
IEEE Trans. Ind. Informatics, 2020
Thermal Model Identification of Computing Nodes in High-Performance Computing Systems.
IEEE Trans. Ind. Electron., 2020
CBinfer: Exploiting Frame-to-Frame Locality for Faster Convolutional Network Inference on Video Streams.
IEEE Trans. Circuits Syst. Video Technol., 2020
Always-On 674μ W@4GOP/s Error Resilient Binary Neural Networks With Aggressive SRAM Voltage Scaling on a 22-nm IoT End-Node.
IEEE Trans. Circuits Syst., 2020
IEEE Trans. Circuits Syst. II Express Briefs, 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Robust Identification of Thermal Models for In-Production High-Performance-Computing Clusters With Machine Learning-Based Data Selection.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Modular Design and Optimization of Biomedical Applications for Ultralow Power Heterogeneous Platforms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Hyperdimensional Computing With Local Binary Patterns: One-Shot Learning of Seizure Onset and Identification of Ictogenic Brain Regions Using Short-Time iEEG Recordings.
IEEE Trans. Biomed. Eng., 2020
Robust Real-Time Embedded EMG Recognition Framework Using Temporal Convolutional Networks on a Multicore IoT Processor.
IEEE Trans. Biomed. Circuits Syst., 2020
A2Event: A Micro-Watt Programmable Frequency-Time Detector for Always-On Energy-Neutral Sensing.
Sustain. Comput. Informatics Syst., 2020
FANN-on-MCU: An Open-Source Toolkit for Energy-Efficient Neural Network Inference at the Edge of the Internet of Things.
IEEE Internet Things J., 2020
IEEE Internet Things J., 2020
Performance-aware predictive-model-based on-chip body-bias regulation strategy for an ULP multi-core cluster in 28 nm UTBB FD-SOI.
Integr., 2020
IEEE J. Emerg. Sel. Topics Circuits Syst., 2020
IEEE J. Emerg. Sel. Topics Circuits Syst., 2020
XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Network on RISC-V based IoT End Nodes.
CoRR, 2020
CoRR, 2020
CoRR, 2020
Manticore: A 4096-core RISC-V Chiplet Architecture for Ultra-efficient Floating-point Computing.
CoRR, 2020
Performance-Aware Predictive-Model-Based On-Chip Body-Bias Regulation Strategy for an ULP Multi-Core Cluster in 28nm UTBB FD-SOI.
CoRR, 2020
Always-On 674uW @ 4GOP/s Error Resilient Binary Neural Networks with Aggressive SRAM Voltage Scaling on a 22nm IoT End-Node.
CoRR, 2020
FPnew: An Open-Source Multi-Format Floating-Point Unit Architecture for Energy-Proportional Transprecision Computing.
CoRR, 2020
Automated Design Space Exploration for optimised Deployment of DNN on Arm Cortex-A CPUs.
CoRR, 2020
Prevention of Microarchitectural Covert Channels on an Open-Source 64-bit RISC-V Core.
CoRR, 2020
Snitch: A 10 kGE Pseudo Dual-Issue Processor for Area and Energy Efficient Execution of Floating-Point Intensive Workloads.
CoRR, 2020
RPR: Random Partition Relaxation for Training; Binary and Ternary Weight Neural Networks.
CoRR, 2020
IEEE Access, 2020
EEG-TCNet: An Accurate Temporal Convolutional Network for Embedded Motor-Imagery Brain-Machine Interfaces.
Proceedings of the 2020 IEEE International Conference on Systems, Man, and Cybernetics, 2020
Q-EEGNet: an Energy-Efficient 8-bit Quantized Parallel EEGNet Implementation for Edge Motor-Imagery Brain-Machine Interfaces.
Proceedings of the IEEE International Conference on Smart Computing, 2020
Memory-Latency-Accuracy Trade-Offs for Continual Learning on a RISC-V Extreme-Edge Node.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2020
Proceedings of the 41st ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2020
Leveraging Automated Mixed-Low-Precision Quantization for Tiny Edge Microcontrollers.
Proceedings of the IoT Streams for Data-Driven Predictive Maintenance and IoT, Edge, and Mobile for Embedded Machine Learning, 2020
Proceedings of the Wireless Mobile Communication and Healthcare, 2020
Memory-Driven Mixed Low Precision Quantization for Enabling Deep Network Inference on Microcontrollers.
Proceedings of the Third Conference on Machine Learning and Systems, 2020
An Accurate EEGNet-based Motor-Imagery Brain-Computer Interface for Low-Power Edge Computing.
Proceedings of the 2020 IEEE International Symposium on Medical Measurements and Applications, 2020
A Synergistic Approach to Predictable Compilation and Scheduling on Commodity Multi-Cores.
Proceedings of the 21st ACM SIGPLAN/SIGBED International Conference on Languages, 2020
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
The AMPERE Project: : A Model-driven development framework for highly Parallel and EneRgy-Efficient computation supporting multi-criteria optimization.
Proceedings of the 23rd IEEE International Symposium on Real-Time Distributed Computing, 2020
Integrating event-based dynamic vision sensors with sparse hyperdimensional computing: a low-power accelerator with online learning capability.
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020
Sound event detection with binary neural networks on tightly power-constrained IoT devices.
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020
A Feature Reduction Strategy For Enabling Lightweight Non-Intrusive Load Monitoring On Edge Devices.
Proceedings of the 29th IEEE International Symposium on Industrial Electronics, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Live Demonstration: Exploiting Body-Biasing for Static Corner Trimming and Maximum Energy Efficiency Operation in 22nm FDX Technology.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
An Energy-efficient Localization System for Imprecisely Positioned Sensor Nodes with Flying UAVs.
Proceedings of the 18th IEEE International Conference on Industrial Informatics, 2020
Proceedings of the 2020 IEEE Sensors, Rotterdam, The Netherlands, October 25-28, 2020, 2020
Proceedings of the 2020 IEEE Sensors, Rotterdam, The Netherlands, October 25-28, 2020, 2020
Proceedings of the 2020 IEEE Sensors, Rotterdam, The Netherlands, October 25-28, 2020, 2020
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
Energy-Efficient Adaptive Machine Learning on IoT End-Nodes With Class-Dependent Confidence.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
Proceedings of the 38th IEEE International Conference on Computer Design, 2020
Proceedings of the 2020 IEEE International Instrumentation and Measurement Technology Conference, 2020
A 4096-core RISC-V Chiplet Architecture for Ultra-efficient Floating-point Computing.
Proceedings of the IEEE Hot Chips 32 Symposium, 2020
Predicting Hard Disk Failures in Data Centers Using Temporal Convolutional Neural Networks.
Proceedings of the Euro-Par 2020: Parallel Processing Workshops, 2020
Using Low-Power, Low-Cost IoT Processors in Clinical Biosignal Research: an In-depth Feasibility Check.
Proceedings of the 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2020
TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
InfiniWolf: Energy Efficient Smart Bracelet for Edge Computing with Dual Source Energy Harvesting.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Energy-Efficient Two-level Instruction Cache Design for an Ultra-Low-Power Multi-core Cluster.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Compressing Subject-specific Brain-Computer Interface Models into One Model by Superposition in Hyperdimensional Space.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
XpulpNN: Accelerating Quantized Neural Networks on RISC-V Processors Through ISA Extensions.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
ATUNs: Modular and Scalable Support for Atomic Operations in a Shared Memory Multiprocessor.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
XwattPilot: A Full-stack Cloud System Enabling Agile Development of Transprecision Software for Low-power SoCs.
Proceedings of the 2020 IEEE Symposium in Low-Power and High-Speed Chips, 2020
Design of an open-source bridge between non-coherent burst-based and coherent cache-line-based memory systems.
Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020
Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020
Proceedings of the CC '20: 29th International Conference on Compiler Construction, 2020
Proceedings of the ASPLOS '20: Architectural Support for Programming Languages and Operating Systems, 2020
Temporal Variability Analysis in sEMG Hand Grasp Recognition using Temporal Convolutional Networks.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020
Neuro-PULP: A Paradigm Shift Towards Fully Programmable Platforms for Neural Interfaces.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020
Evolvable Hyperdimensional Computing: Unsupervised Regeneration of Associative Memory to Recover Faulty Components.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020
Binary Models for Motor-Imagery Brain-Computer Interfaces: Sparse Random Projection and Binarized SVM.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020
2019
J. Signal Process. Syst., 2019
J. Signal Process. Syst., 2019
The Cost of Application-Class Processing: Energy and Performance Analysis of a Linux-Ready 1.7-GHz 64-Bit RISC-V Core in 22-nm FDSOI Technology.
IEEE Trans. Very Large Scale Integr. Syst., 2019
Self-Sustaining Acoustic Sensor With Programmable Pattern Recognition for Underwater Monitoring.
IEEE Trans. Instrum. Meas., 2019
IEEE Trans. Instrum. Meas., 2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
An Energy-Efficient Integrated Programmable Array Accelerator and Compilation Flow for Near-Sensor Ultralow Power Processing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
IEEE Trans. Computers, 2019
A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets.
IEEE Trans. Computers, 2019
BioWolf: A Sub-10-mW 8-Channel Advanced Brain-Computer Interface Platform With a Nine-Core Processor and BLE Connectivity.
IEEE Trans. Biomed. Circuits Syst., 2019
Online Learning and Classification of EMG-Based Gestures on a Parallel Ultra-Low Power Platform Using Hyperdimensional Computing.
IEEE Trans. Biomed. Circuits Syst., 2019
SmarTEG: An Autonomous Wireless Sensor Node for High Accuracy Accelerometer-Based Monitoring.
Sensors, 2019
Ultrasound as a Tool to Study Muscle-Tendon Functions during Locomotion: A Systematic Review of Applications.
Sensors, 2019
Efficient Biosignal Processing Using Hyperdimensional Computing: Network Templates for Combined Learning and Classification of ExG Signals.
Proc. IEEE, 2019
Combining PREM compilation and static scheduling for high-performance and predictable MPSoC execution.
Parallel Comput., 2019
Microprocess. Microsystems, 2019
Mr.Wolf: An Energy-Precision Scalable Parallel Ultra Low Power SoC for IoT Edge Processing.
IEEE J. Solid State Circuits, 2019
Hardware Optimizations of Dense Binary Hyperdimensional Computing: Rematerialization of Hypervectors, Binarized Bundling, and Combinational Associative Memory.
ACM J. Emerg. Technol. Comput. Syst., 2019
A Minimally Invasive Low-Power Platform for Real-Time Brain Computer Interaction Based on Canonical Correlation Analysis.
IEEE Internet Things J., 2019
IEEE Internet Things J., 2019
Integr., 2019
Int. J. High Perform. Comput. Appl., 2019
EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2019
IEEE J. Emerg. Sel. Topics Circuits Syst., 2019
A semisupervised autoencoder-based approach for anomaly detection in high performance computing systems.
Eng. Appl. Artif. Intell., 2019
HR-SAR-Net: A Deep Neural Network for Urban Scene Segmentation from High-Resolution SAR Data.
CoRR, 2019
PULP-NN: Accelerating Quantized Neural Networks on Parallel Ultra-Low-Power RISC-V Processors.
CoRR, 2019
5 Parallel Prism: A topology for pipelined implementations of convolutional neural networks using computational memory.
CoRR, 2019
Ara: A 1 GHz+ Scalable and Energy-Efficient RISC-V Vector Processor with Multi-Precision Floating Point Support in 22 nm FD-SOI.
CoRR, 2019
CoRR, 2019
CoRR, 2019
The Cost of Application-Class Processing: Energy and Performance Analysis of a Linux-ready 1.7GHz 64bit RISC-V Core in 22nm FDSOI Technology.
CoRR, 2019
CoRR, 2019
IEEE Access, 2019
Proceedings of the 5th IEEE World Forum on Internet of Things, 2019
FANNCortexM: An Open Source Toolkit for Deployment of Multi-layer Neural Networks on ARM Cortex-M Family Microcontrollers : Performance Analysis with Stress Detection.
Proceedings of the 5th IEEE World Forum on Internet of Things, 2019
A 0.80pJ/flop, 1.24Tflop/sW 8-to-64 bit Transprecision Floating-Point Unit for a 64 bit RISC-V Processor in 22nm FD-SOI.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019
Proceedings of the International Conference for High Performance Computing, 2019
An Energy-Efficient IoT node for HMI applications based on an ultra-low power Multicore Processor.
Proceedings of the IEEE Sensors Applications Symposium, 2019
Supporting the Scale-Up of High Performance Application to Pre-Exascale Systems: The ANTAREX Approach.
Proceedings of the 27th Euromicro International Conference on Parallel, 2019
Proceedings of the Platform for Advanced Scientific Computing Conference, 2019
Constrained deep neural network architecture search for IoT devices accounting for hardware calibration.
Proceedings of the Advances in Neural Information Processing Systems 32: Annual Conference on Neural Information Processing Systems 2019, 2019
Proceedings of the 2019 9th International IEEE/EMBS Conference on Neural Engineering (NER), 2019
Proceedings of the IEEE 8th International Workshop on Advances in Sensors and Interfaces, 2019
Proceedings of the IEEE 8th International Workshop on Advances in Sensors and Interfaces, 2019
Proceedings of the IEEE 8th International Workshop on Advances in Sensors and Interfaces, 2019
Proceedings of the IEEE 8th International Workshop on Advances in Sensors and Interfaces, 2019
Proceedings of the IEEE 8th International Workshop on Advances in Sensors and Interfaces, 2019
NTX: A 260 Gflop/sW Streaming Accelerator for Oblivious Floating-Point Algorithms in 22 nm FD-SOI.
Proceedings of the 2019 International SoC Design Conference, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the 17th IEEE International Conference on Industrial Informatics, 2019
Proceedings of the 2019 IEEE SENSORS, Montreal, QC, Canada, October 27-30, 2019, 2019
Proceedings of the 48th International Conference on Parallel Processing, 2019
The Floating Point Trinity: A Multi-modal Approach to Extreme Energy-Efficiency and Performance.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
PULP-NN: A Computing Library for Quantized Neural Network inference at the edge on RISC-V Based Parallel Ultra Low Power Clusters.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Thermal Characterization of a Tier0 Datacenter Room in Normal and Thermal Emergency Conditions.
Proceedings of the High Performance Computing in Science and Engineering, 2019
Proceedings of the Tenth International Green and Sustainable Computing Conference, 2019
On-line Testing for Autonomous Systems driven by RISC-V Processor Design Verification.
Proceedings of the 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2019
An Open Source and Open Hardware Deep Learning-Powered Visual Navigation Engine for Autonomous Nano-UAVs.
Proceedings of the 15th International Conference on Distributed Computing in Sensor Systems, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
NTX: An Energy-efficient Streaming Accelerator for Floating-point Generalized Reduction Workloads in 22 nm FD-SOI.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Learning to infer: RL-based search for DNN primitive selection on Heterogeneous Embedded Systems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Hardware-Accelerated Energy-Efficient Synchronization and Communication for Ultra-Low-Power Tightly Coupled Clusters.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Laelaps: An Energy-Efficient Seizure Detection Algorithm from Long-term Human iEEG Recordings without False Alarms.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
DORY: Lightweight memory hierarchy management for deep NN inference on IoT endnodes: work-in-progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, 2019
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019
Embedding principal component analysis for data reduction in structural health monitoring on low-cost IoT gateways.
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019
Analysis of Contraction Effort Level in EMG-Based Gesture Recognition Using Hyperdimensional Computing.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2019
Proceedings of the AI*IA 2019 - Advances in Artificial Intelligence, 2019
Hyperdimensional Computing-based Multimodality Emotion Recognition with Physiological Signals.
Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019
Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019
Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019
Proceedings of the Thirty-Third AAAI Conference on Artificial Intelligence, 2019
2018
NEURAghe: Exploiting CPU-FPGA Synergies for Efficient and Flexible CNN Inference Acceleration on Zynq SoCs.
ACM Trans. Reconfigurable Technol. Syst., 2018
Quantifying the Impact of Variability and Heterogeneity on the Energy Efficiency for a Next-Generation Ultra-Green Supercomputer.
IEEE Trans. Parallel Distributed Syst., 2018
IEEE Trans. Parallel Distributed Syst., 2018
IEEE Trans. Multi Scale Comput. Syst., 2018
IEEE Trans. Image Process., 2018
IEEE Trans. Instrum. Meas., 2018
Runtime Support for Multiple Offload-Based Programming Models on Clustered Manycore Accelerators.
IEEE Trans. Emerg. Top. Comput., 2018
IEEE Trans. Emerg. Top. Comput., 2018
ACM Trans. Embed. Comput. Syst., 2018
A Heterogeneous Multicore System on Chip for Energy Efficient Brain Inspired Computing.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
XNOR Neural Engine: A Hardware Accelerator IP for 21.6-fJ/op Binary Neural Network Inference.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Sustain. Comput. Informatics Syst., 2018
On-Demand LoRa: Asynchronous TDMA for Energy Efficient and Low Latency Communication in IoT.
Sensors, 2018
Leveraging Energy Harvesting and Wake-Up Receivers for Long-Term Wireless Sensor Networks.
Sensors, 2018
Microprocess. Microsystems, 2018
IEEE J. Solid State Circuits, 2018
A 0.45-0.7 V 1-6 Gb/s 0.29-0.58 pJ/b Source-Synchronous Transceiver Using Near-Threshold Operation.
IEEE J. Solid State Circuits, 2018
Optimizing memory bandwidth exploitation for OpenVX applications on embedded many-core accelerators.
J. Real Time Image Process., 2018
J. Low Power Electron., 2018
A sensor fusion approach for drowsiness detection in wearable ultra-low-power systems.
Inf. Fusion, 2018
Int. J. Parallel Program., 2018
A 2.2-µW Cognitive Always-On Wake-Up Circuit for Event-Driven Duty-Cycling of IoT Sensor Nodes.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018
Exploring Embedding Methods in Binary Hyperdimensional Computing: A Case Study for Motor-Imagery based Brain-Computer Interfaces.
CoRR, 2018
NTX: An Energy-efficient Streaming Accelerator for Floating-point Generalized Reduction Workloads in 22nm FD-SOI.
CoRR, 2018
Robust online identification of thermal models for in-production HPC clusters with machine learning-based data selection.
CoRR, 2018
CoRR, 2018
COUNTDOWN - three, two, one, low power! A Run-time Library for Energy Saving in MPI Communication Primitives.
CoRR, 2018
Dwarf in a Giant: Enabling Scalable, High-Resolution HPC Energy Monitoring for Real-Time Profiling and Analytics.
CoRR, 2018
Proceedings of the 14th International Conference on Wireless and Mobile Computing, 2018
Proceedings of the 14th International Conference on Wireless and Mobile Computing, 2018
Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018
BinaryEye: A 20 kfps Streaming Camera System on FPGA with Real-Time On-Device Image Recognition Using Binary Neural Networks.
Proceedings of the 13th IEEE International Symposium on Industrial Embedded Systems, 2018
Proceedings of the 5th Conference on Systems for Built Environments, 2018
Proceedings of the 5th Conference on Systems for Built Environments, 2018
Proceedings of the 21st International Workshop on Software and Compilers for Embedded Systems, 2018
Combining microbial fuel cell and ultra-low power event-driven audio detector for zero-power sensing in underwater monitoring.
Proceedings of the 2018 IEEE Sensors Applications Symposium, 2018
Proceedings of the 2018 IEEE Sensors Applications Symposium, 2018
Combining PREM compilation and ILP scheduling for high-performance and predictable MPSoC execution.
Proceedings of the 9th International Workshop on Programming Models and Applications for Multicores and Manycores, 2018
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018
Hyperdrive: A Systolically Scalable Binary-Weight CNN Inference Engine for mW IoT End-Nodes.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
An EMG Gesture Recognition System with Flexible High-Density Sensors and Brain-Inspired High-Dimensional Classifier.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Live Demonstration: Body-Bias Based Performance Monitoring and Compensation for a Near-Threshold Multi-Core Cluster in 28nm FD-SOI Technology.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
A Transprecision Floating-Point Architecture for Energy-Efficient Embedded Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Smart Wearable Wristband for EMG based Gesture Recognition Powered by Solar Energy Harvester.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Sub-mW multi-Gbps chip-to-chip communication Links for Ultra-Low Power IoT end-nodes.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Combining LoRa and RTK to achieve a high precision self-sustaining geo-localization system: poster abstract.
Proceedings of the 17th ACM/IEEE International Conference on Information Processing in Sensor Networks, 2018
A Scalable Framework for Online Power Modelling of High-Performance Computing Nodes in Production.
Proceedings of the 2018 International Conference on High Performance Computing & Simulation, 2018
Architecture-aware design and implementation of CNN algorithms for embedded inference: the ALOHA project.
Proceedings of the 30th International Conference on Microelectronics, 2018
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
Scalable and Efficient Virtual Memory Sharing in Heterogeneous SoCs with TLB Prefetching and MMU-Aware DMA Engine.
Proceedings of the 36th IEEE International Conference on Computer Design, 2018
Rat Cortical Layers Classification extracting Evoked Local Field Potential Images with Implanted Multi-Electrode Sensor.
Proceedings of the 20th IEEE International Conference on e-Health Networking, 2018
Proceedings of the Ninth International Green and Sustainable Computing Conference, 2018
Fast and Accurate Multiclass Inference for MI-BCIs Using Large Multiscale Temporal and Spectral Features.
Proceedings of the 26th European Signal Processing Conference, 2018
Proceedings of the 16th IEEE International Conference on Embedded and Ubiquitous Computing, 2018
An accurate low-cost Crackmeter with LoRaWAN communication and energy harvesting capability.
Proceedings of the 23rd IEEE International Conference on Emerging Technologies and Factory Automation, 2018
Proceedings of the Workshop on INTelligent Embedded Systems Architectures and Applications, 2018
Mr. Wolf: A 1 GFLOP/s Energy-Proportional Parallel Ultra Low Power SoC for IOT Edge Processing.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018
ANTAREX: A DSL-Based Approach to Adaptively Optimizing and Enforcing Extra-Functional Properties in High Performance Computing.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Energy proportionality in near-threshold computing servers and cloud data centers: Consolidating or Not?
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
PULP-HD: accelerating brain-inspired high-dimensional computing on a parallel ultra-low power platform.
Proceedings of the 55th Annual Design Automation Conference, 2018
Proceedings of the 2018 IEEE Symposium in Low-Power and High-Speed Chips, 2018
Quantized NNs as the definitive solution for inference on low-power ARM MCUs?: work-in-progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2018
Chipmunk: A systolically scalable 0.9 mm<sup>2</sup>, 3.08Gop/s/mW @ 1.2 mW accelerator for near-sensor recurrent neural network inference.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018
Always-ON visual node with a hardware-software event-based binarized neural network inference engine.
Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018
Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018
Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018
A Wearable Device for Brain-Machine Interaction with Augmented Reality Head-Mounted Display.
Proceedings of the 13th EAI International Conference on Body Area Networks, 2018
A Cost-Effective Embedded Platform for Scalable Multichannel Biopotential Acquisition.
Proceedings of the 13th EAI International Conference on Body Area Networks, 2018
Embedded Classification of Local Field Potentials Recorded from Rat Barrel Cortex with Implanted Multi-Electrode Array.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018
One-shot Learning for iEEG Seizure Detection Using End-to-end Binary Operations: Local Binary Patterns with Hyperdimensional Computing.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018
Proceedings of the 29th IEEE International Conference on Application-specific Systems, 2018
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2018
Proceedings of the 2nd Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, 2018
HERO: an open-source research platform for HW/SW exploration of heterogeneous manycore systems.
Proceedings of the 2nd Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, 2018
COUNTDOWN: a run-time library for application-agnostic energy saving in MPI communication primitives.
Proceedings of the 2nd Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, 2018
2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
Lightweight Virtual Memory Support for Zero-Copy Sharing of Pointer-Rich Data Structures in Heterogeneous Embedded SoCs.
IEEE Trans. Parallel Distributed Syst., 2017
IEEE/ACM Trans. Netw., 2017
IEEE Trans. Hum. Mach. Syst., 2017
Efficient Virtual Memory Sharing via On-Accelerator Page Table Walking in Heterogeneous Embedded SoCs.
ACM Trans. Embed. Comput. Syst., 2017
IEEE Trans. Circuits Syst. Video Technol., 2017
An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
Kinetic AC/DC Converter for Electromagnetic Energy Harvesting in Autonomous Wearable Devices.
IEEE Trans. Circuits Syst. II Express Briefs, 2017
Smart Energy-Efficient Clock Synthesizer for Duty-Cycled Sensor SoCs in 65 nm/28nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
A Synchronization-Based Hybrid-Memory Multi-Core Architecture for Energy-Efficient Biomedical Signal Processing.
IEEE Trans. Computers, 2017
IEEE Trans. Biomed. Circuits Syst., 2017
IEEE Trans. Biomed. Circuits Syst., 2017
A Prosthetic Hand Body Area Controller Based on Efficient Pattern Recognition Control Strategies.
Sensors, 2017
Energy-Efficient Context Aware Power Management with Asynchronous Protocol for Body Sensor Network.
Mob. Networks Appl., 2017
IEEE Micro, 2017
Zeroing for HW-efficient compressed sensing architectures targeting data compression in wireless sensor networks.
Microprocess. Microsystems, 2017
Increasing the energy efficiency of microcontroller platforms with low-design margin co-processors.
Microprocess. Microsystems, 2017
An Extended Shared Logarithmic Unit for Nonlinear Function Kernel Acceleration in a 65-nm CMOS Multicore Cluster.
IEEE J. Solid State Circuits, 2017
IEEE Internet Things J., 2017
IEEE Embed. Syst. Lett., 2017
A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors.
IEEE Des. Test, 2017
HERO: Heterogeneous Embedded Research Platform for Exploring RISC-V Manycore Accelerators on FPGA.
CoRR, 2017
Chipmunk: A Systolically Scalable 0.9 mm<sup>2</sup>, 3.08 Gop/s/mW @ 1.2 mW Accelerator for Near-Sensor Recurrent Neural Network Inference.
CoRR, 2017
Soft-to-Hard Vector Quantization for End-to-End Learned Compression of Images and Neural Networks.
CoRR, 2017
Proceedings of the VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things, 2017
Prediction horizon vs. efficiency of optimal dynamic thermal control policies in HPC nodes.
Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017
Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems, 2017
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017
Slow and steady wins the race? A comparison of ultra-low-power RISC-V cores for Internet-of-Things applications.
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017
Temperature and process-aware performance monitoring and compensation for an ULP multi-core cluster in 28nm UTBB FD-SOI technology.
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017
Approximate DIV and SQRT instructions for the RISC-V ISA: An efficiency vs. accuracy analysis.
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017
Energy Saving and Thermal Management Opportunities in a Workload-Aware MPI Runtime for a Scientific HPC Computing Node.
Proceedings of the Parallel Computing is Everywhere, 2017
Soft-to-Hard Vector Quantization for End-to-End Learning Compressible Representations.
Proceedings of the Advances in Neural Information Processing Systems 30: Annual Conference on Neural Information Processing Systems 2017, 2017
Proceedings of the New Generation of CAS, 2017
Energy Efficient System for Tactile Data Decoding Using an Ultra-Low Power Parallel Platform.
Proceedings of the New Generation of CAS, 2017
A wearable EEG-based drowsiness detection system with blink duration and alpha waves analysis.
Proceedings of the 8th International IEEE/EMBS Conference on Neural Engineering, 2017
Proceedings of the 7th IEEE International Workshop on Advances in Sensors and Interfaces, 2017
DeepEmote: Towards multi-layer neural networks in a low power wearable multi-sensors bracelet.
Proceedings of the 7th IEEE International Workshop on Advances in Sensors and Interfaces, 2017
Plenty of room at the bottom? Micropower deep learning for cognitive cyber physical systems.
Proceedings of the 7th IEEE International Workshop on Advances in Sensors and Interfaces, 2017
A sub-10mW real-time implementation for EMG hand gesture recognition based on a multi-core biomedical SoC.
Proceedings of the 7th IEEE International Workshop on Advances in Sensors and Interfaces, 2017
LightProbe: A 64-channel programmable ultrasound transducer head with an integrated front-end and a 26.4 Gb/s optical link.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
A wide tuning-range ADFLL for mW-SoCs with dithering-enhanced accuracy in 65 nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Design of an Energy Aware Petaflops Class High Performance Cluster Based on Power Architecture.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017
CAS-CNN: A deep convolutional neural network for image compression artifact suppression.
Proceedings of the 2017 International Joint Conference on Neural Networks, 2017
Long-term monitoring of small-sized birds using a miniaturized bluetooth-low-energy sensor node.
Proceedings of the 2017 IEEE SENSORS, Glasgow, United Kingdom, October 29, 2017
Proceedings of the 11th International Conference on Distributed Smart Cameras, 2017
Proceedings of the International Conference on Computational Science, 2017
Multi-core data analytics SoC with a flexible 1.76 Gbit/s AES-XTS cryptographic accelerator in 65 nm CMOS.
Proceedings of the Fourth Workshop on Cryptography and Security in Computing Systems, 2017
Proceedings of the 25th European Signal Processing Conference, 2017
Impact of temporal subsampling on accuracy and performance in practical video classification.
Proceedings of the 25th European Signal Processing Conference, 2017
A multi-sensor and parallel processing SoC for wearable and implantable telemetry systems.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
Paving the Way Towards a Highly Energy-Efficient and Highly Integrated Compute Node for the Exascale Revolution: The ExaNoDe Approach.
Proceedings of the Euromicro Conference on Digital System Design, 2017
Towards a Mobile Health Platform with Parallel Processing and Multi-sensor Capabilities.
Proceedings of the Euromicro Conference on Digital System Design, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
WULoRa: An energy efficient IoT end-node for energy harvesting and heterogeneous communication.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
A scan-chain based state retention methodology for IoT processors operating on intermittent energy.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Continuous learning of HPC infrastructure models using big data analytics and in-memory processing tools.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
An Ultra-Low Power Address-Event Sensor Interface for Energy-Proportional Time-to-Information Extraction.
Proceedings of the 54th Annual Design Automation Conference, 2017
Proceedings of the Computing Frontiers Conference, 2017
Proceedings of the Computing Frontiers Conference, 2017
A 2.1 μW event-driven wake-up circuit based on a level-crossing ADC for pattern recognition in healthcare.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
Proceedings of the Advanced Concepts for Intelligent Vision Systems, 2017
Proceedings of the 1st Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, 2017
2016
He-P2012: Performance and Energy Exploration of Architecturally Heterogeneous Many-Cores.
J. Signal Process. Syst., 2016
PULP: A Ultra-Low Power Parallel Accelerator for Energy-Efficient and Flexible Embedded Vision.
J. Signal Process. Syst., 2016
Ekho: A 30.3W, 10k-Channel Fully Digital Integrated 3-D Beamformer for Medical Ultrasound Imaging Achieving 298M Focal Points per Second.
IEEE Trans. Very Large Scale Integr. Syst., 2016
A Constraint Programming Scheduler for Heterogeneous High-Performance Computing Machines.
IEEE Trans. Parallel Distributed Syst., 2016
Power, Area, and Performance Optimization of Standard Cell Memory Arrays Through Controlled Placement.
ACM Trans. Design Autom. Electr. Syst., 2016
Design, Implementation, and Performance Evaluation of a Flexible Low-Latency Nanowatt Wake-Up Radio Receiver.
IEEE Trans. Ind. Informatics, 2016
IEEE Trans. Ind. Informatics, 2016
Hybrid ASIC/FPGA System for Fully Automatic Stereo-to-Multiview Conversion Using IDW.
IEEE Trans. Circuits Syst. Video Technol., 2016
Thermal Analysis and Interpolation Techniques for a Logic + WideIO Stacked DRAM Test Chip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Hibernus++: A Self-Calibrating and Adaptive System for Transiently-Powered Embedded Devices.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Sustain. Comput. Informatics Syst., 2016
Variability Mitigation in Nanometer CMOS Integrated Systems: A Survey of Techniques From Circuits to Software.
Proc. IEEE, 2016
Controlling NUMA effects in embedded manycore applications with lightweight nested parallelism support.
Parallel Comput., 2016
IEEE J. Emerg. Sel. Topics Circuits Syst., 2016
IEEE Des. Test, 2016
Computationally Efficient Target Classification in Multispectral Image Data with Deep Neural Networks.
CoRR, 2016
Proceedings of the IEEE Topical Conference on Wireless Sensors and Sensor Networks, 2016
Proceedings of the High Performance Computing - 31st International Conference, 2016
A Dual Processor Energy-Efficient Platform with Multi-core Accelerator for Smart Sensing.
Proceedings of the Sensor Systems and Software - 7th International Conference, S-Cube 2016, 2016
Proceedings of the Sensor Systems and Software - 7th International Conference, S-Cube 2016, 2016
SNW-MAC: An Asynchronous Protocol Leveraging Wake-Up Receivers for Data Gathering in Star Networks.
Proceedings of the Sensor Systems and Software - 7th International Conference, S-Cube 2016, 2016
A high-efficiency runtime reconfigurable IP for CNN acceleration on a mid-range all-programmable SoC.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016
YodaNN: An Ultra-Low Power Convolutional Neural Network Accelerator Based on Binary Weights.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
4.6 A 65nm CMOS 6.4-to-29.2pJ/FLOP@0.8V shared logarithmic floating point unit for acceleration of nonlinear function kernels in a tightly coupled processor cluster.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
A heterogeneous multi-core system-on-chip for energy efficient brain inspired vision.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Autonomous smartwatch with flexible sensors for accurate and continuous mapping of skin temperature.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Smart Cities Conference, 2016
Poster Abstract: KinetiSee - A Perpetual Wearable Camera Acquisition System with a Kinetic Harvester.
Proceedings of the 15th ACM/IEEE International Conference on Information Processing in Sensor Networks, 2016
Poster Abstract: An Ultra-Low Power Wake up Radio with Addressing and Retransmission Capabilities for Advanced Energy Efficient MAC Protocols.
Proceedings of the 15th ACM/IEEE International Conference on Information Processing in Sensor Networks, 2016
Poster Abstract: MagoNode++ - A Wake-Up-Radio-Enabled Wireless Sensor Mote for Energy-Neutral Applications.
Proceedings of the 15th ACM/IEEE International Conference on Information Processing in Sensor Networks, 2016
Poster Abstract: Wake-Up Receivers for Energy Efficient and Low Latency Communication.
Proceedings of the 15th ACM/IEEE International Conference on Information Processing in Sensor Networks, 2016
Proceedings of the 2016 IEEE SENSORS, Orlando, FL, USA, October 30 - November 3, 2016, 2016
Evaluation of synchronization protocols for fine-grain HPC sensor data time-stamping and collection.
Proceedings of the International Conference on High Performance Computing & Simulation, 2016
Proceedings of the International Conference on High Performance Computing & Simulation, 2016
Proceedings of the IECON 2016, 2016
Hyperdimensional biosignal processing: A case study for EMG-based hand gesture recognition.
Proceedings of the IEEE International Conference on Rebooting Computing, 2016
Always-on motion detection with application-level error control on a near-threshold approximate computing platform.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
Proceedings of the 2016 IEEE Global Communications Conference, 2016
Proceedings of the 14th ACM/IEEE Symposium on Embedded Systems for Real-Time Multimedia, 2016
A 2 MS/s 10A Hall current sensor SoC with digital compressive sensing encoder in 0.16 µm BCD.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
Proceedings of the Computer Vision - ECCV 2016 Workshops, 2016
Proceedings of the ECAI 2016 - 22nd European Conference on Artificial Intelligence, 29 August-2 September 2016, The Hague, The Netherlands, 2016
A Low Latency and Energy Efficient Communication Architecture for Heterogeneous Long-Short Range Communication.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016
Autotuning and adaptivity approach for energy efficient Exascale HPC systems: The ANTAREX approach.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
High-efficiency logarithmic number unit design based on an improved cotransformation scheme.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Low-power multichannel spectro-temporal feature extraction circuit for audio pattern wake-up.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
A power-efficient 3-D on-chip interconnect for multi-core accelerators with stacked L2 cache.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
An optimized task-based runtime system for resource-constrained parallel accelerators.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Quantifying the benefits of compressed sensing on a WBSN-based real-time biosignal monitor.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Enabling the heterogeneous accelerator model on ultra-low power microcontroller platforms.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing.
Proceedings of the 2016 IEEE Symposium in Low-Power and High-Speed Chips, 2016
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016
Proceedings of the 2016 International Conference on Compilers, 2016
Application of compressed sensing to ECG signals: Decoder-side benefits of the rakeness approach.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016
Sampling modulation: An energy efficient novel feature extraction for biosignal processing.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016
Accuracy and Performance Trade-Offs of Logarithmic Number Units in Multi-Core Clusters.
Proceedings of the 23nd IEEE Symposium on Computer Arithmetic, 2016
Design and Evaluation of a Processing-in-Memory Architecture for the Smart Memory Cube.
Proceedings of the Architecture of Computing Systems - ARCS 2016, 2016
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2016
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2016
2015
Cost-Effective Design of Mesh-of-Tree Interconnect for Multicore Clusters With 3-D Stacked L2 Scratchpad Memory.
IEEE Trans. Very Large Scale Integr. Syst., 2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
IEEE Trans. Parallel Distributed Syst., 2015
IEEE Trans. Ind. Informatics, 2015
ACM Trans. Embed. Comput. Syst., 2015
ACM Trans. Embed. Comput. Syst., 2015
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
A Low-Power Architecture for Punctured Compressed Sensing and Estimation in Wireless Sensor-Nodes.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
Energy-Efficiency Analysis of Analog and Digital Compressive Sensing in Wireless Sensors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
Architecture Support for Tightly-Coupled Multi-Core Clusters with Shared-Memory HW Accelerators.
IEEE Trans. Computers, 2015
IEEE Trans. Biomed. Circuits Syst., 2015
Sub-Sampling Framework Comparison for Low-Power Data Gathering: A Comparative Analysis.
Sensors, 2015
Temperature variation aware multi-scale delay, power and thermal analysis at RT and gate level.
Integr., 2015
Hibernus: Sustaining Computation During Intermittent Supply for Energy-Harvesting Systems.
IEEE Embed. Syst. Lett., 2015
Proceedings of the 11th IEEE International Conference on Wireless and Mobile Computing, 2015
Tailoring instruction-set extensions for an ultra-low power tightly-coupled cluster of OpenRISC cores.
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015
Proceedings of the 2015 Visual Communications and Image Processing, 2015
Proceedings of the 2015 Visual Communications and Image Processing, 2015
A framework for optimizing OpenVX applications performance on embedded manycore accelerators.
Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems, 2015
Self-powered wireless sensor nodes for monitoring radioactivity in contaminated areas using unmanned aerial vehicles.
Proceedings of the IEEE Sensors Applications Symposium, 2015
Proceedings of the IEEE Sensors Applications Symposium, 2015
Experimental evaluation of a sEMG-based human-robot interface for human-like grasping tasks.
Proceedings of the 2015 IEEE International Conference on Robotics and Biomimetics, 2015
Proceedings of the Nordic Circuits and Systems Conference, 2015
Proceedings of the 2015 workshop on Wearable Systems and Applications, 2015
ADRENALINE: An OpenVX Environment to Optimize Embedded Vision Applications on Many-core Accelerators.
Proceedings of the IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2015
Proceedings of the IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2015
Energy-Aware Bio-signal Compressed Sensing Reconstruction: FOCUSS on the WBSN-Gateway.
Proceedings of the IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2015
Towards Internet of Things for event-driven low-power gas sensing using carbon nanotubes.
Proceedings of the 6th International Workshop on Advances in Sensors and Interfaces, 2015
Synergistic Architecture and Programming Model Support for Approximate Micropower Computing.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
3.8 A 0.45-to-0.7V 1-to-6Gb/S 0.29-to-0.58pJ/b source-synchronous transceiver using automatic phase calibration in 65nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
Ultra-Low Power Context Recognition Fusing Sensor Data from an Energy-Neutral Smart Watch.
Proceedings of the Internet of Things. IoT Infrastructures, 2015
Beyond duty cycling: Wake-up radio with selective awakenings for long-lived wireless sensing systems.
Proceedings of the 2015 IEEE Conference on Computer Communications, 2015
Hybrid EMG classifier based on HMM and SVM for hand gesture recognition in prosthetics.
Proceedings of the IEEE International Conference on Industrial Technology, 2015
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015
Proceedings of the 2015 IEEE Hot Chips 27 Symposium (HCS), 2015
Playing with Fire: Transactional Memory Revisited for Error-Resilient and Energy-Efficient MPSoC Execution.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
Proceedings of the Future Access Enablers for Ubiquitous and Intelligent Infrastructures, 2015
Proceedings of the 13th IEEE International Conference on Embedded and Ubiquitous Computing, 2015
Digitally controlled feedback for DC offset cancellation in a wearable multichannel EMG platform.
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015
DRAM or no-DRAM?: exploring linear solver architectures for image domain warping in 28 nm CMOS.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Paper, pen and ink: an innovative system and software framework to assist writing rehabilitation.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Reducing energy consumption in microcontroller-based platforms with low design margin co-processors.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
A ultra-low-energy convolution engine for fast brain-inspired vision in multicore clusters.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Task scheduling strategies to mitigate hardware variability in embedded shared memory clusters.
Proceedings of the 52nd Annual Design Automation Conference, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
ANTAREX - AutoTuning and Adaptivity appRoach for Energy Efficient eXascale HPC Systems.
Proceedings of the 18th IEEE International Conference on Computational Science and Engineering, 2015
Proceedings of the Principles and Practice of Constraint Programming, 2015
Lightweight virtual memory support for many-core accelerators in heterogeneous embedded SoCs.
Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015
An Evaluation of Memory Sharing Performance for Heterogeneous Embedded SoCs with Many-Core Accelerators.
Proceedings of the 2015 International Workshop on Code Optimisation for Multi and Many Cores, 2015
Runtime Support for Multiple Offload-Based Programming Models on Embedded Manycore Accelerators.
Proceedings of the 2015 International Workshop on Code Optimisation for Multi and Many Cores, 2015
Exploring multi-banked shared-L1 program cache on ultra-low power, tightly coupled processor clusters.
Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015
Multiple Biopotentials Acquisition System for Wearable Applications.
Proceedings of the BIODEVICES 2015, 2015
Controlled placement of standard cell memory arrays for high density and low power in 28nm FD-SOI.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2015
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2015
Proceedings of the Doctoral Consortium (DC) co-located with the 14th Conference of the Italian Association for Artificial Intelligence (AI*IA 2015), 2015
2014
J. Signal Process. Syst., 2014
Ensuring Survivability of Resource-Intensive Sensor Networks Through Ultra-Low Power Overlays.
IEEE Trans. Ind. Informatics, 2014
IEEE Trans. Ind. Informatics, 2014
IEEE Trans. Ind. Electron., 2014
Bias-Compensated Least Squares Identification of Distributed Thermal Models for Many-Core Systems-on-Chip.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
IEEE Trans. Computers, 2014
IEEE Trans. Computers, 2014
IEEE Trans. Computers, 2014
Clamp-and-Forget: A self-sustainable non-invasive wireless sensor node for smart metering applications.
Microelectron. J., 2014
Microelectron. J., 2014
An ultra-low power resilient multi-core architecture with static and dynamic tolerance to ambient temperature-induced variability.
Microprocess. Microsystems, 2014
J. Low Power Electron., 2014
Sleep power minimisation using adaptive duty-cycling of DC-DC converters in state-retentive systems.
IET Circuits Devices Syst., 2014
Improving Resilience to Timing Errors by Exposing Variability Effects to Software in Tightly-Coupled Processor Clusters.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2014
An ultra low power high sensitivity wake-up radio receiver with addressing capability.
Proceedings of the IEEE 10th International Conference on Wireless and Mobile Computing, 2014
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014
Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014
Quantifying the impact of variability on the energy efficiency for a next-generation ultra-green supercomputer.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014
Approximate compressed sensing: ultra-low power biosignal processing via aggressive voltage scaling on a hybrid memory multi-core processor.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014
An architecture for low-power compressed sensing and estimation in wireless sensor nodes.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the 2nd International Workshop on Many-core Embedded Systems, 2014
Proceedings of the IEEE International Conference on Consumer Electronics, 2014
Dynamic variability management in mobile multicore processors under lifetime constraints.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014
Proceedings of the International Conference on High Performance Computing & Simulation, 2014
Proceedings of the International Green Computing Conference, 2014
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014
Customizing an open source processor to fit in an ultra-low power cluster with a shared L1 memory.
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014
Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, 2014
A HLS-Based Toolflow to Design Next-Generation Heterogeneous Many-Core Platforms with Shared Memory.
Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, 2014
Energy optimization in 3D MPSoCs with Wide-I/O DRAM using temperature variation aware bank-wise refresh.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Tightly-coupled hardware support to dynamic parallelism acceleration in embedded shared memory clusters.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
A tightly-coupled hardware controller to improve scalability and programmability of shared-memory heterogeneous clusters.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Hybrid memory architecture for voltage scaling in ultra-low power multi-core biomedical processors.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Thermal analysis and model identification techniques for a logic + WIDEIO stacked DRAM test chip.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Unveiling Eurora - Thermal and power characterization of the most energy-efficient supercomputer in the world.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Optimizing memory bandwidth in OpenVX graph execution on embedded many-core accelerators.
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014
Rakeness-based compressed sensing on ultra-low power multi-core biomedicai processors.
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014
An Approximate Computing Technique for Reducing the Complexity of a Direct-Solver for Sparse Linear Systems in Real-Time Video Processing.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
Energy-Efficient GPGPU Architectures via Collaborative Compilation and Memristive Memory-Based Computing.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
Gesture Recognition in Ego-centric Videos Using Dense Trajectories and Hand Segmentation.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2014
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2014
Supporting localized OpenVX kernel execution for efficient computer vision application development on STHORM many-core platform.
Proceedings of the Computing Frontiers Conference, CF'14, 2014
Proceedings of the Computing Frontiers Conference, CF'14, 2014
Proceedings of the BIOSIGNALS 2014, 2014
Assessing the area/power/performance tradeoffs for an integrated fully-digital, large-scale 3D-ultrasound beamformer.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014
Exploring DMA-assisted prefetching strategies for software caches on multicore clusters.
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014
SIR10US: A tightly coupled elliptic-curve cryptography co-processor for the OpenRISC.
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014
2013
IEEE Trans. Parallel Distributed Syst., 2013
Thermal and Energy Management of High-Performance Multicores: Distributed and Self-Calibrating Model-Predictive Controller.
IEEE Trans. Parallel Distributed Syst., 2013
ACM Trans. Embed. Comput. Syst., 2013
Spatial Memoization: Concurrent Instruction Reuse to Correct Timing Errors in SIMD Architectures.
IEEE Trans. Circuits Syst. II Express Briefs, 2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
IEEE Trans. Computers, 2013
IEEE Trans. Computers, 2013
An integrated, programming model-driven framework for NoC-QoS support in cluster-based embedded many-cores.
Parallel Comput., 2013
J. Parallel Distributed Comput., 2013
A case for three-dimensional stacking of tightly coupled data memories over multi-core clusters using low-latency interconnects.
IET Comput. Digit. Tech., 2013
IEEE J. Emerg. Sel. Topics Circuits Syst., 2013
SIM<i>in</i>G-1<i>k</i>: A thousand-core simulator running on general-purpose graphical processing units.
Concurr. Comput. Pract. Exp., 2013
Wearable low power dry surface wireless sensor node for healthcare monitoring application.
Proceedings of the 9th IEEE International Conference on Wireless and Mobile Computing, 2013
A Complete Real-Time Feature Extraction and Matching System Based on Semantic Kernels Binarized.
Proceedings of the VLSI-SoC: At the Crossroads of Emerging Trends, 2013
Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013
Proceedings of the 1st International Workshop on Energy Neutral Sensing Systems, 2013
Improving the efficiency of air-flow energy harvesters combining active and passive rectifiers.
Proceedings of the 1st International Workshop on Energy Neutral Sensing Systems, 2013
Proceedings of the 1st International Workshop on Energy Neutral Sensing Systems, 2013
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013
3D logarithmic interconnect: Stacking multiple L1 memory dies over multi-core clusters.
Proceedings of the 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2013
Efficient energy management and data recovery in sensor networks using latent variables based tensor factorization.
Proceedings of the 16th ACM International Conference on Modeling, 2013
Clamp-and-measure forever: A MOSFET-based circuit for energy harvesting and measurement targeted for power meters.
Proceedings of the 5th IEEE International Workshop on Advances in Sensors and Interfaces, 2013
A versatile biomedical wireless sensor node with novel drysurface sensors and energy efficient power management.
Proceedings of the 5th IEEE International Workshop on Advances in Sensors and Interfaces, 2013
Proceedings of the 5th IEEE International Workshop on Advances in Sensors and Interfaces, 2013
Prolonging the lifetime of wireless sensor networks using light-weight forecasting algorithms.
Proceedings of the 2013 IEEE Eighth International Conference on Intelligent Sensors, 2013
Transparent and energy-efficient speculation on NUMA architectures for embedded MPSoCs.
Proceedings of the 1st International Workshop on Many-core Embedded Systems 2013, 2013
Improving the programmability of STHORM-based heterogeneous systems with offload-enabled OpenMP.
Proceedings of the 1st International Workshop on Many-core Embedded Systems 2013, 2013
VirtualSoC: A Full-System Simulation Environment for Massively Parallel Heterogeneous System-on-Chip.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013
Proceedings of the 11th IEEE International Conference on Industrial Informatics, 2013
A power-aware multi harvester power unit with hydrogen fuel cell for embedded systems in outdoor applications.
Proceedings of the International Green Computing Conference, 2013
Proceedings of the 10th FPGAworld Conference, 2013
Errors-in-variables identification of thermal models for many-core computing systems.
Proceedings of the 12th European Control Conference, 2013
An Ambient Temperature Variation Tolerance Scheme for an Ultra Low Power Shared-L1 Processor Cluster.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
Proceedings of the IEEE International Conference on Distributed Computing in Sensor Systems, 2013
Trade-offs of Forecasting Algorithm for Extending WSN Lifetime in a Real-World Deployment.
Proceedings of the IEEE International Conference on Distributed Computing in Sensor Systems, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Hierarchically focused guardbanding: an adaptive approach to mitigate PVT variations and aging.
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Architecture and programming model support for efficient heterogeneous computing on tigthly-coupled shared-memory clusters.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Workload and user experience-aware dynamic reliability management in multicore processors.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2013
A variability-aware OpenMP environment for efficient execution of accuracy-configurable computation on shared-FPU processor clusters.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013
Synthesis-friendly techniques for tightly-coupled integration of hardware accelerators into shared-memory multi-core clusters.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013
Proceedings of the Computing Frontiers Conference, 2013
Proceedings of the 52nd IEEE Conference on Decision and Control, 2013
Proceedings of the 2013 IEEE International Conference on Body Sensor Networks, 2013
A highly efficient, thread-safe software cache implementation for tightly-coupled multicore clusters.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013
Combination of hybrid energy harvesters with MEMS piezoelectric and nano-Watt radio wake up to extend lifetime of system for wireless sensor nodes.
Proceedings of the ARCS 2013, 2013
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2013
Proceedings of the ACM Symposium on Applied Perception 2013, 2013
A high-performance multiported L2 memory IP for scalable three-dimensional integration.
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013
2012
ACM Trans. Design Autom. Electr. Syst., 2012
Distributed Compressive Sampling for Lifetime Optimization in Dense Wireless Sensor Networks.
IEEE Trans. Ind. Informatics, 2012
Network-Level Power-Performance Trade-Off in Wearable Activity Recognition: A Dynamic Sensor Selection Approach.
ACM Trans. Embed. Comput. Syst., 2012
Variability-tolerant workload allocation for MPSoC energy minimization under real-time constraints.
ACM Trans. Embed. Comput. Syst., 2012
IEEE Trans. Circuits Syst. II Express Briefs, 2012
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
Variability-Aware Task Allocation for Energy-Efficient Quality of Service Provisioning in Embedded Streaming Multimedia Applications.
IEEE Trans. Computers, 2012
IEEE Trans. Computers, 2012
Reconfigurable natural interaction in smart environments: approach and prototype implementation.
Pers. Ubiquitous Comput., 2012
Microelectron. J., 2012
A Buffer-Sizing Algorithm for Network-on-Chips with Multiple Voltage-Frequency Islands.
J. Electr. Comput. Eng., 2012
Int. J. Embed. Real Time Commun. Syst., 2012
IET Circuits Devices Syst., 2012
A high-throughput and low-latency interconnection network for multi-core Clusters with 3-D stacked L2 tightly-coupled data memory.
Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012
Proceedings of the VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design, 2012
3D-LIN: A configurable low-latency interconnect for multi-core clusters with 3D stacked L1 memory.
Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012
Opportunistic hierarchical classification for power optimization in wearable movement monitoring systems.
Proceedings of the 7th IEEE International Symposium on Industrial Embedded Systems, 2012
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012
Analytic comparison of wake-up receivers for WSNs and benefits over the wake-on radio scheme.
Proceedings of the 7th ACM workshop on Performance monitoring and measurement of heterogeneous wireless and wired networks, 2012
Combined methods to extend the lifetime of power hungry WSN with multimodal sensors and nanopower wakeups.
Proceedings of the 8th International Wireless Communications and Mobile Computing Conference, 2012
Proceedings of the 2012 International Symposium on System on Chip, 2012
Procedure hopping: a low overhead solution to mitigate variability in shared-L1 processor clusters.
Proceedings of the International Symposium on Low Power Electronics and Design, 2012
Characterization of lithium-ion capacitors for low-power energy neutral wireless sensor networks.
Proceedings of the Ninth International Conference on Networked Sensing, 2012
A retrospective look at xpipes: The exciting ride from a design experience to a design platform for nanoscale networks-on-chip.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012
OpenMP-based Synergistic Parallelization and HW Acceleration for On-Chip Shared-Memory Clusters.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Analysis of instruction-level vulnerability to dynamic voltage and temperature variations.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Fast and lightweight support for nested parallelism on cluster-based embedded many-cores.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Smart power unit with ultra low power radio trigger capabilities for wireless sensor networks.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
A resilient architecture for low latency communication in shared-L1 processor clusters.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
P2012: Building an ecosystem for a scalable, modular and high-efficiency embedded computing accelerator.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Quantifying the impact of frequency scaling on the energy efficiency of the single-chip cloud computer.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Design of a collective communication infrastructure for barrier synchronization in cluster-based nanoscale MPSoCs.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Platform 2012, a many-core computing accelerator for embedded SoCs: performance evaluation of visual analytics applications.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the Integration of AI and OR Techniques in Contraint Programming for Combinatorial Optimzation Problems, 2012
Don't burn your mobile!: safe computational re-sprinting via model predictive control.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012
Full system simulation of many-core heterogeneous SoCs using GPU and QEMU semihosting.
Proceedings of the 5th Annual Workshop on General Purpose Processing with Graphics Processing Units, 2012
Design and validation of an attitude and heading reference system for an aerial robot prototype.
Proceedings of the American Control Conference, 2012
Optimization and Controlled Systems: A Case Study on Thermal Aware Workload Dispatching.
Proceedings of the Twenty-Sixth AAAI Conference on Artificial Intelligence, 2012
2011
Proceedings of the 3D Integration for NoC-based SoC Architectures, 2011
Row-Based Power-Gating: A Novel Sleep Transistor Insertion Methodology for Leakage Power Optimization in Nanometer CMOS Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
Characterization and Implementation of Fault-Tolerant Vertical Links for 3-D Networks-on-Chip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
Microprocess. Microsystems, 2011
IEEE J. Solid State Circuits, 2011
Int. J. Parallel Program., 2011
IET Comput. Digit. Tech., 2011
Fine-Grained Power and Body-Bias Control for Near-Threshold Deep Sub-Micron CMOS Circuits.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
Ann. Oper. Res., 2011
Bus Access Design for Combined Worst and Average Case Execution Time Optimization of Predictable Real-Time Applications on Multiprocessor Systems-on-Chip.
Proceedings of the 17th IEEE Real-Time and Embedded Technology and Applications Symposium, 2011
Merging RFID, visual and gesture recognition technologies to generate and manage smart environments.
Proceedings of the 2011 IEEE International Conference on RFID-Technologies and Applications, 2011
Power/Performance Exploration of Single-core and Multi-core Processor Approaches for Biomedical Signal Processing.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011
Proceedings of the NOCS 2011, 2011
Proceedings of the 3rd Many-core Applications Research Community (MARC) Symposium. Proceedings of the 3rd MARC Symposium, 2011
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
Proceedings of the 2011 International Symposium on System on Chip, 2011
Proceedings of the 2011 International Symposium on System on Chip, 2011
Thermal-aware system-level modeling and management for Multi-Processor Systems-on-Chip.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of 20th International Conference on Computer Communications and Networks, 2011
Proceedings of the Formal Methods for Components and Objects, 10th International Symposium, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
A fully-synthesizable single-cycle interconnection network for Shared-L1 processor clusters.
Proceedings of the Design, Automation and Test in Europe, 2011
An efficient on-line task allocation algorithm for QoS and energy efficiency in multicore multimedia platforms.
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
A distributed and self-calibrating model-predictive controller for energy and thermal management of high-performance multicores.
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the Integration of AI and OR Techniques in Constraint Programming for Combinatorial Optimization Problems, 2011
Proceedings of the Principles and Practice of Constraint Programming - CP 2011, 2011
Proceedings of the Principles and Practice of Constraint Programming - CP 2011, 2011
SoC-TM: integrated HW/SW support for transactional memory programming on embedded MPSoCs.
Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011
MPOpt-Cell: a high-performance data-flow programming environment for the CELL BE processor.
Proceedings of the 8th Conference on Computing Frontiers, 2011
Proceedings of the 11th IEEE/ACM International Symposium on Cluster, 2011
A Cost-effective Indoor Vibrotactile Navigation System for the Blind.
Proceedings of the HEALTHINF 2011, 2011
Proceedings of the 8th IEEE International Conference on Advanced Video and Signal-Based Surveillance, 2011
Synchronous Reactive Fine Grain Tasks Management for Homogeneous Many-Core Architectures.
Proceedings of the ARCS 2011, 2011
Proceedings of the Low Power Networks-on-Chip., 2011
2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
Comparative Analysis of NoCs for Two-Dimensional Versus Three-Dimensional SoCs Supporting Multiple Voltage and Frequency Islands.
IEEE Trans. Circuits Syst. II Express Briefs, 2010
SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
IEEE Trans. Computers, 2010
Stochastic allocation and scheduling for conditional task graphs in multi-processor systems-on-chip.
J. Sched., 2010
Microelectron. J., 2010
Comparison of energy intake prediction algorithms for systems powered by photovoltaic harvesters.
Microelectron. J., 2010
Microelectron. J., 2010
A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits.
J. Low Power Electron., 2010
Int. J. Ambient Comput. Intell., 2010
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010
Proceedings of the IEEE Fifth International Symposium on Industrial Embedded Systems, 2010
Proceedings of the Seventh Annual IEEE Communications Society Conference on Sensor, 2010
Proceedings of the 4th International Conference on Pervasive Computing Technologies for Healthcare, 2010
Wearable assistant for load monitoring: recognition of on - body load placement from gait alterations.
Proceedings of the 4th International Conference on Pervasive Computing Technologies for Healthcare, 2010
Automatic synthesis of near-threshold circuits with fine-grained performance tunability.
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010
Proceedings of the 15th IEEE Symposium on Computers and Communications, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Scalable instruction set simulator for thousand-core architectures running on GPGPUs.
Proceedings of the 2010 International Conference on High Performance Computing & Simulation, 2010
Adaptive TDMA bus allocation and elastic scheduling: A unified approach for enhancing robustness in multi-core RT systems.
Proceedings of the 28th International Conference on Computer Design, 2010
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
A virtual platform environment for exploring power, thermal and reliability management control strategies in high-performance multicores.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
Proceedings of the Smart Sensing and Context - 5th European Conference, 2010
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Efficient OpenMP data mapping for multicore platforms with vertically stacked memory.
Proceedings of the Design, Automation and Test in Europe, 2010
Design space exploration of a mesochronous link for cost-effective and flexible GALS NOCs.
Proceedings of the Design, Automation and Test in Europe, 2010
An efficient distributed memory interface for many-core platform with 3D stacked DRAM.
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
An efficient and complete approach for throughput-maximal SDF allocation and scheduling on multi-core platforms.
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the 47th Design Automation Conference, 2010
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010
Variability-tolerant run-time workload allocation for MPSoC energy minimization under real-time constraints.
Proceedings of the 7th Conference on Computing Frontiers, 2010
Vertical stealing: robust, locality-aware do-all workload distribution for 3D MPSoCs.
Proceedings of the 2010 International Conference on Compilers, 2010
Proceedings of the 5th International ICST Conference on Body Area Networks, 2010
Proceedings of the 10th IEEE International Conference on Bioinformatics and Bioengineering, 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
2009
Design of a Flexible Reactivation Cell for Safe Power-Mode Transition in Power-Gated Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
Reducing the Abstraction and Optimality Gaps in the Allocation and Scheduling for Variable Voltage/Frequency MPSoC Platforms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Exploiting Temporal Discharge Current Information to Improve the Efficiency of Clustered Power-Gating.
J. Low Power Electron., 2009
Hidden Markov Model based gesture recognition on low-cost, low-power Tangible User Interfaces.
Entertain. Comput., 2009
Proceedings of the Stabilization, 2009
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009
A wireless system for gait and posture analysis based on pressure insoles and Inertial Measurement Units.
Proceedings of the 3rd International Conference on Pervasive Computing Technologies for Healthcare, 2009
Comparing tightly and loosely coupled mesochronous synchronizers in a NoC switch architecture.
Proceedings of the Third International Symposium on Networks-on-Chips, 2009
Load Optimization of an Inductive Power Link for Remote Powering of Biomedical Implants.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the Intelligent Technologies for Interactive Entertainment, 2009
Proceedings of the Third ACM/IEEE International Conference on Distributed Smart Cameras, 2009
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
Capturing topology-level implications of link synthesis techniques for nanoscale networks-on-chip.
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009
<i>HVS-DBS</i>: human visual system-aware dynamic luminance backlight scaling for video streaming applications.
Proceedings of the 9th ACM & IEEE International conference on Embedded software, 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Physically clustered forward body biasing for variability compensation in nanometer CMOS design.
Proceedings of the Design, Automation and Test in Europe, 2009
Adaptive idleness distribution for non-uniform aging tolerance in MultiProcessor Systems-on-Chip.
Proceedings of the Design, Automation and Test in Europe, 2009
Effectiveness of adaptive supply voltage and body bias as post-silicon variability compensation techniques for full-swing and low-swing on-chip communication channels.
Proceedings of the Design, Automation and Test in Europe, 2009
Efficient OpenMP support and extensions for MPSoCs with explicitly managed memory hierarchy.
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
System-level power/performance evaluation of 3D stacked DRAMs for mobile applications.
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the Integration of AI and OR Techniques in Constraint Programming for Combinatorial Optimization Problems, 2009
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems.
Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints.
Proceedings of the 2009 International Conference on Complex, 2009
Predictability vs. Efficiency in the Multicore Era: Fight of Titans or Happy Ever after?.
Proceedings of the Computer Aided Verification, 21st International Conference, 2009
Multimodal Abandoned/Removed Object Detection for Low Power Video Surveillance Systems.
Proceedings of the Sixth IEEE International Conference on Advanced Video and Signal Based Surveillance, 2009
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
Proceedings of the Embedded Systems Design and Verification, 2009
Proceedings of the Embedded Systems Design and Verification, 2009
2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: ECG prototype architectural design space exploration.
ACM Trans. Design Autom. Electr. Syst., 2008
Modeling and Optimization of a Solar Energy Harvester System for Self-Powered Wireless Sensor Networks.
IEEE Trans. Ind. Electron., 2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Interfacing human and computer with wireless body area sensor networks: the WiMoCA solution.
Multim. Tools Appl., 2008
A Fast and Accurate Technique for Mapping Parallel Applications on Stream-Oriented MPSoC Platforms with Communication Awareness.
Int. J. Parallel Program., 2008
Exploring architectural solutions for energy optimisations in bus-based system-on-chip.
IET Comput. Digit. Tech., 2008
Comput. Math. Appl., 2008
TOM: enhancement and extension of a tool suite for <i>in silico</i> approaches to multigenic hereditary disorders.
Bioinform., 2008
Proceedings of the International Conference on Computer Graphics and Interactive Techniques, 2008
Validation of a wireless portable biofeedback system for balance control: Preliminary results.
Proceedings of the 2nd International ICST Conference on Pervasive Computing Technologies for Healthcare, 2008
Temporal Discharge Current Driven Clustering for Improved Leakage Power Reduction in Row-Based Power-Gating.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008
Exploring High-Dimensional Topologies for NoC Design Through an Integrated Analysis and Synthesis Framework.
Proceedings of the Second International Symposium on Networks-on-Chips, 2008
Multiple power-gating domain (multi-VGND) architecture for improved leakage power reduction.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
On quantifying the figures of merit of power-gating for leakage power minimization in nanometer CMOS circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the Third International Conference on Systems, 2008
Resource Management Policy Handling Multiple Use-Cases in MPSoC Platforms Using Constraint Programming.
Proceedings of the Logic Programming, 24th International Conference, 2008
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Proceedings of the Hybrid Systems: Computation and Control, 11th International Workshop, 2008
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008
Activity Recognition from On-Body Sensors: Accuracy-Power Trade-Off by Dynamic Sensor Selection.
Proceedings of the Wireless Sensor Networks, 5th European Conference, 2008
Proceedings of the Wireless Sensor Networks, 5th European Conference, 2008
DBS4video: dynamic luminance backlight scaling based on multi-histogram frame characterization for video streaming application.
Proceedings of the 8th ACM & IEEE International conference on Embedded software, 2008
Cellflow: A Parallel Application Development Environment with Run-Time Support for the Cell BE Processor.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008
How to Live with Uncertainties: Exploiting the Performance Benefits of Self-Timed Logic In Synchronous Design.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008
Analysis of Power Management Strategies for a Large-Scale SoC Platform in 65nm Technology.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008
Process Variation Tolerant Pipeline Design Through a Placement-Aware Multiple Voltage Island Design Style.
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Temperature Control of High-Performance Multi-core Platforms Using Convex Optimization.
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Integration of AI and OR Techniques in Constraint Programming for Combinatorial Optimization Problems, 2008
A Constraint Programming Approach for Allocation and Scheduling on the CELL Broadband Engine.
Proceedings of the Principles and Practice of Constraint Programming, 2008
Proceedings of the Extended Abstracts Proceedings of the 2008 Conference on Human Factors in Computing Systems, 2008
Proceedings of the Biomedical Engineering Systems and Technologies, 2008
Statistical Significance in Omic Data Analyses - Alternative/Complementary Method for Efficient Automatic Identification of Statistically Significant Tests in High Throughput Biological Studies.
Proceedings of the First International Conference on Biomedical Electronics and Devices, 2008
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008
2007
A Method for Routing Packets Across Multiple Paths in NoCs with In-Order Delivery and Fault-Tolerance Gaurantees.
VLSI Design, 2007
VLSI Design, 2007
Synthesis of Predictable Networks-on-Chip-Based Interconnect Architectures for Chip Multiprocessors.
IEEE Trans. Very Large Scale Integr. Syst., 2007
ACM Trans. Design Autom. Electr. Syst., 2007
IEEE Trans. Inf. Technol. Biomed., 2007
Hardware/Software Architecture for Real-Time ECG Monitoring and Analysis Leveraging MPSoC Technology.
Trans. High Perform. Embed. Archit. Compil., 2007
ACM Trans. Embed. Comput. Syst., 2007
ACM Trans. Embed. Comput. Syst., 2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support.
IEEE Trans. Computers, 2007
A hardware/software framework for supporting transactional memory in a MPSoC environment.
SIGARCH Comput. Archit. News, 2007
J. Real Time Image Process., 2007
IEEE Des. Test Comput., 2007
MOCA: A Low-Power, Low-Cost Motion Capture System Based on Integrated Accelerometers.
Adv. Multim., 2007
Tutorial 5: SoC Communication Architectures: Technology, Current Practice, Research, and Trends.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the First International Symposium on Networks-on-Chips, 2007
Proceedings of the First International Symposium on Networks-on-Chips, 2007
Supporting vertical links for 3D networks-on-chip: toward an automated design and analysis flow.
Proceedings of the 2nd Internationa ICST Conference on Nano-Networks, 2007
Proceedings of the 15th International Conference on Multimedia 2007, 2007
Control and datapath decoupling in the design of a NoC switch: area, power and performance implications.
Proceedings of the International Symposium on System-on-Chip, 2007
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
A lightweight parallel java execution environment for embedded multiprocessor systems-on-chip.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
Multi-processor operating system emulation framework with thermal feedback for systems-on-chip.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
Design of a family of sleep transistor cells for a clustered power-gating flow in 65nm technology.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
MP-Queue: an Efficient Communication Library for Embedded Streaming Multimedia Platforms.
Proceedings of the 2007 5th Workshop on Embedded Systems for Real-Time Multimedia, 2007
Communication-aware stochastic allocation and scheduling framework for conditional task graphs in multi-processor systems-on-chip.
Proceedings of the 7th ACM & IEEE International conference on Embedded software, 2007
Interactive presentation: Efficient computation of discharge current upper bounds for clustered sleep transistor sizing.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Interactive presentation: Capturing the interaction of the communication, memory and I/O subsystems in memory-centric industrial MPSoC platforms.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the Power-aware Computing Systems, 21.01. - 26.01.2007, 2007
Proceedings of the Power-aware Computing Systems, 21.01. - 26.01.2007, 2007
Performance analysis and design space exploration for high-end biomedical applications: challenges and solutions.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007
Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms.
Proceedings of the 2007 International Conference on Compilers, 2007
Enhancing the spatial resolution of presence detection in a PIR based wireless surveillance network.
Proceedings of the Fourth IEEE International Conference on Advanced Video and Signal Based Surveillance, 2007
Distributed video surveillance using hardware-friendly sparse large margin classifiers.
Proceedings of the Fourth IEEE International Conference on Advanced Video and Signal Based Surveillance, 2007
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
2006
IEEE Trans. Instrum. Meas., 2006
ACM Trans. Embed. Comput. Syst., 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Nucleic Acids Res., 2006
Microelectron. J., 2006
CMOS DNA Sensor Array With Integrated A/D Conversion Based on Label-Free Capacitance Measurement.
IEEE J. Solid State Circuits, 2006
J. Low Power Electron., 2006
Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems.
Integr., 2006
Int. J. Artif. Intell. Tools, 2006
Proceedings of the IFIP VLSI-SoC 2006, 2006
Proceedings of the VLSI-SoC: Research Trends in VLSI and Systems on Chip, 2006
Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips.
Proceedings of the IFIP VLSI-SoC 2006, 2006
Proceedings of the Embedded Computer Systems: Architectures, 2006
Proceedings of the Pervasive Computing, 2006
Proceedings of the 4th IEEE Conference on Pervasive Computing and Communications Workshops (PerCom 2006 Workshops), 2006
A Cooperative, Accurate Solving Framework for Optimal Allocation, Scheduling and Frequency Selection on Energy-Efficient MPSoCs.
Proceedings of the International Symposium on System-on-Chip, 2006
Comparison of a Timing-Error Tolerant Scheme with a Traditional Re-transmission Mechanism for Networks on Chips.
Proceedings of the International Symposium on System-on-Chip, 2006
Fully Electronic CMOS DNA Detection Array Based on Capacitance Measurement with On-Chip Analog-to-Digital Conversion.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006
Proceedings of the 11th IEEE Symposium on Computers and Communications (ISCC 2006), 2006
Proceedings of the 11th IEEE Symposium on Computers and Communications (ISCC 2006), 2006
Proceedings of the From Model-Driven Design to Resource Management for Distributed Embedded Systems, 2006
Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006
Proceedings of the 18th Euromicro Conference on Real-Time Systems, 2006
Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
A multi-path routing strategy with guaranteed in-order packet delivery and fault-tolerance for networks on chip.
Proceedings of the 43rd Design Automation Conference, 2006
A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: architectural design space exploration.
Proceedings of the 43rd Design Automation Conference, 2006
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip.
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the Integration of AI and OR Techniques in Constraint Programming for Combinatorial Optimization Problems, 2006
MPSoC ECG biochip: a multiprocessor system-on-chip for real-time human heart monitoring and analysis.
Proceedings of the Third Conference on Computing Frontiers, 2006
Proceedings of the 19th IEEE International Symposium on Computer-Based Medical Systems (CBMS 2006), 2006
Networks on chips - technology and tools.
The Morgan Kaufmann series in systems on silicon, Elsevier Morgan Kaufmann, ISBN: 978-0-12-370521-1, 2006
2005
Proceedings of the Embedded Systems Handbook., 2005
Proceedings of the Embedded Systems Handbook., 2005
J. VLSI Signal Process., 2005
IEEE Trans. Parallel Distributed Syst., 2005
IEEE Trans. Inf. Technol. Biomed., 2005
Discovering Coherent Biclusters from Gene Expression Data Using Zero-Suppressed Binary Decision Diagrams.
IEEE ACM Trans. Comput. Biol. Bioinform., 2005
Error control schemes for on-chip communication links: the energy-reliability tradeoff.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
IEEE Trans. Biomed. Eng., 2005
Int. J. Embed. Syst., 2005
Measuring Efficiency and Executability of Allocation and Scheduling in Multi-Processor Systems-on-Chip.
Intelligenza Artificiale, 2005
IEEE Des. Test Comput., 2005
Architectural, System Level and Protocol Level Techniques for Power Optimization for Networked Embedded Systems.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Proceedings of the VLSI-SoC: From Systems To Silicon, 2005
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005
Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005
Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005
Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005
Networks on Chips: A Synthesis Perspective.
Proceedings of the Parallel Computing: Current & Future Issues of High-End Computing, 2005
Proceedings of the Third ACM International Workshop on Video Surveillance & Sensor Networks, 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the IJCAI-05, Proceedings of the Nineteenth International Joint Conference on Artificial Intelligence, Edinburgh, Scotland, UK, July 30, 2005
Proceedings of the Systems Communications 2005 (ICW / ICHSN / ICMCS / SENET 2005), 2005
Application-Specific Power-Aware Workload Allocation for Voltage Scalable MPSoC Platforms.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
Exploring the energy efficiency of cache coherence protocols in single-chip multi-processors.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Hardware-Software Design of a Smart Sensor for Fully-Electronic DNA Hybridization Detection.
Proceedings of the 2005 Design, 2005
Proceedings of the Power-aware Computing Systems, 3.-8. April 2005, 2005
Proceedings of the Power-aware Computing Systems, 3.-8. April 2005, 2005
Mapping and physical planning of networks-on-chip architectures with quality-of-service guarantees.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Network On-Chip Design for Gigascale Systems-on-Chip.
Proceedings of the Industrial Information Technology Handbook, 2005
2004
Adaptive Algorithmic Power Optimization for Multimedia Workload in Mobile Environments.
Proceedings of the Mobile Computing Handbook., 2004
Memory energy minimization by data compression: algorithms, architectures and implementation.
IEEE Trans. Very Large Scale Integr. Syst., 2004
A Class of Code Compression Schemes for Reducing Power Consumption in Embedded Microprocessor Systems.
IEEE Trans. Computers, 2004
J. Syst. Archit., 2004
IEEE Des. Test Comput., 2004
Post-layout leakage power minimization based on distributed sleep transistor insertion.
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004
Analyzing Power Consumption of Message Passing Primitives in a Single-Chip Multiprocessor.
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004
A Simulation-Based Power-Aware Architecture Exploration of a Multiprocessor System-on-Chip Design.
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Design, 2004
Block-Enabled Memory Macros: Design Space Exploration and Application-Specific Tuning.
Proceedings of the 2004 Design, 2004
Sizing and Characterization of Leakage-Control Cells for Layout-Aware Distributed Power-Gating.
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 41th Design Automation Conference, 2004
A low-power motion capture system with integrated accelerometers [gesture recognition applications].
Proceedings of the 1st IEEE Consumer Communications and Networking Conference, 2004
Proceedings of the 2004 International Conference on Compilers, 2004
Proceedings of the 4th IEEE International Symposium on BioInformatics and BioEngineering (BIBE 2004), 2004
Proceedings of the 4th IEEE International Symposium on BioInformatics and BioEngineering (BIBE 2004), 2004
Proceedings of the Ultra Low-Power Electronics and Design, 2004
2003
IEEE Trans. Very Large Scale Integr. Syst., 2003
Energy-aware design of embedded memories: A survey of technologies, architectures, and optimization techniques.
ACM Trans. Embed. Comput. Syst., 2003
IEEE Trans. Computers, 2003
Des. Autom. Embed. Syst., 2003
Proceedings of the Integrated Circuit and System Design, 2003
Hardw are Implementation of Data Compression Algorithms for Memory Energy Optimization.
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
xpipes: a Latency Insensitive Parameterized Network-on-chip Architecture For Multi-Processor SoCs.
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003
Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003
Proceedings of the 2003 Design, 2003
SDRAM-Energy-Aware Memory Allocation for Dynamic Multi-Media Applications on Multi-Processor Platforms.
Proceedings of the 2003 Design, 2003
Proceedings of the 2003 Design, 2003
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the International Conference on Compilers, 2003
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003
SDRAM-Energy-Aware Memory Allocation for Dynamic Multi-Media Applications on Multi-Processor Platforms.
Proceedings of the Embedded Software for SoC, 2003
2002
IEEE Trans. Very Large Scale Integr. Syst., 2002
Minimizing memory access energy in embedded systems by selective instruction compression.
IEEE Trans. Very Large Scale Integr. Syst., 2002
IEEE Trans. Very Large Scale Integr. Syst., 2002
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002
IEEE Trans. Computers, 2002
A Framework for Modeling and Estimating the Energy Dissipation of VLIW-Based Embedded Systems.
Des. Autom. Embed. Syst., 2002
Proceedings of the 2002 IEEE Wireless Communications and Networking Conference Record, 2002
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002
Contents provider-assisted dynamic voltage scaling for low energy multimedia applications.
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002
Parametric timing and power macromodels for high level simulation of low-swing interconnects.
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002
Energy-efficient and reliable low-swing signaling for on-chip buses based on redundant coding.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
An adaptive data compression scheme for memory traffic minimization in processor-based systems.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 IEEE International Symposium on Biomedical Imaging, 2002
Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002
Proceedings of the 2002 Design, 2002
Proceedings of the 2002 Design, 2002
Hardware-Assisted Data Compression for Energy Minimization in Systems with Embedded Processors.
Proceedings of the 2002 Design, 2002
Proceedings of the 39th Design Automation Conference, 2002
Proceedings of the International Conference on Compilers, 2002
Proceedings of the International Conference on Compilers, 2002
Memory design techniques for low energy embedded systems.
Kluwer, ISBN: 978-0-7923-7690-3, 2002
2001
IEEE Trans. Very Large Scale Integr. Syst., 2001
IEEE Trans. Very Large Scale Integr. Syst., 2001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
Synthesis of power-managed sequential components based oncomputational kernel extraction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
SIGARCH Comput. Archit. News, 2001
Proceedings of the 14th International Symposium on Systems Synthesis, 2001
Powering Networks on Chips: Energy-Efficient and Reliable Interconnect Design for SoCs.
Proceedings of the 14th International Symposium on Systems Synthesis, 2001
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Proceedings of the 38th Design Automation Conference, 2001
Proceedings of the 38th Design Automation Conference, 2001
From Architecture to Layout: Partitioned Memory Synthesis for Embedded Systems-on-Chip.
Proceedings of the 38th Design Automation Conference, 2001
Processor frequency setting for energy minimization of streaming multimedia application.
Proceedings of the Ninth International Symposium on Hardware/Software Codesign, 2001
2000
IEEE Trans. Very Large Scale Integr. Syst., 2000
IEEE Trans. Very Large Scale Integr. Syst., 2000
ACM Trans. Design Autom. Electr. Syst., 2000
ACM Trans. Design Autom. Electr. Syst., 2000
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000
Increasing Energy Efficiency of Embedded Systems by Application-Specific Memory Hierarchy Generation.
IEEE Des. Test Comput., 2000
Proceedings of the 13th International Symposium on System Synthesis, 2000
Proceedings of the 13th International Symposium on System Synthesis, 2000
Proceedings of the 13th International Symposium on System Synthesis, 2000
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000
Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000
Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000
Proceedings of the 2000 Design, 2000
Proceedings of the 2000 Design, 2000
Proceedings of the 2000 Design, 2000
Proceedings of the 37th Conference on Design Automation, 2000
Synthesis of application-specific memories for power optimization in embedded systems.
Proceedings of the 37th Conference on Design Automation, 2000
Proceedings of the Eighth International Workshop on Hardware/Software Codesign, 2000
1999
Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers.
ACM Trans. Design Autom. Electr. Syst., 1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
Automatic Synthesis of Large Telescopic Units Based on Near-Minimum Timed Supersetting.
IEEE Trans. Computers, 1999
IEEE J. Solid State Circuits, 1999
Proceedings of the 12th International Symposium on System Synthesis, 1999
Efficient switching activity computation during high-level synthesis of control-dominated designs.
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999
Proceedings of the 25th EUROMICRO '99 Conference, 1999
Proceedings of the 1999 Design, 1999
Proceedings of the 1999 Design, 1999
Proceedings of the 36th Conference on Design Automation, 1999
Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses.
Proceedings of the 36th Conference on Design Automation, 1999
Kernel-Based Power Optimization of RTL Components: Exact and Approximate Extraction Algorithms.
Proceedings of the 36th Conference on Design Automation, 1999
1998
IEEE Trans. Very Large Scale Integr. Syst., 1998
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998
Proceedings of the 1998 Design, 1998
Proceedings of the 1998 Design, 1998
Proceedings of the 35th Conference on Design Automation, 1998
Proceedings of the 35th Conference on Design Automation, 1998
Dynamic power management - design techniques and CAD tools.
Kluwer, ISBN: 978-0-7923-8086-3, 1998
1997
IEEE Trans. Very Large Scale Integr. Syst., 1997
ACM Trans. Design Autom. Electr. Syst., 1997
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997
Asymptotic Zero-Transition Activity Encoding for Address Busses in Low-Power Microprocessor-Based Systems.
Proceedings of the 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 1997
Proceedings of the European Design and Test Conference, 1997
Symbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks.
Proceedings of the European Design and Test Conference, 1997
Telescopic Units: Increasing the Average Throughput of Pipelined Designs by Adaptive Latency Control.
Proceedings of the 34st Conference on Design Automation, 1997
1996
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
Proceedings of the 9th International Symposium on System Synthesis, 1996
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996
Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996
Proceedings of the 1996 European Design and Test Conference, 1996
Proceedings of the 33st Conference on Design Automation, 1996
1995
IEEE J. Solid State Circuits, March, 1995
Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995
Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995
1994
IEEE Des. Test Comput., 1994