Love Kumar Sah

Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

2021

High-Level Synthesis of Key-Obfuscated RTL IP with Design Lockout and Camouflaging.

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[DOI]

ACM Trans. Design Autom. Electr. Syst., 2021

Defending Against Misspeculation-based Cache Probe Attacks Using Variable Record Table.

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[DOI]

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

2020

Micro-architectural Countermeasures for Control Flow and Misspeculation Based Software Attacks.

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[DOI]

PhD thesis, 2020

A Framework for Hardware Trojan Vulnerability Estimation and Localization in RTL Designs.

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[DOI]

J. Hardw. Syst. Secur., 2020

Basic Block Encoding Based Run-time CFI Check for Embedded Software.

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[DOI]

Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020

Analytical Estimation and Localization of Hardware Trojan Vulnerability in RTL Designs.

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[DOI]

Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

2019

Variable Record Table: A Run-time Solution for Mitigating Buffer Overflow Attack.

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[DOI]

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

DLockout: A Design Lockout Technique for Key Obfuscated RTL IP Designs.

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[DOI]

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019

2018

An Efficient Hardware-Oriented Runtime Approach for Stack-based Software Buffer Overflow Attacks.

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[DOI]

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2018

Empirical Word-Level Analysis of Arithmetic Module Architectures for Hardware Trojan Susceptibility.

[BibT_eX]

[DOI]