Louise Trevillyan

According to our database, Louise Trevillyan authored at least 18 papers between 1980 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2013

Depth controlled symmetric function fanin tree restructure.

Hua Xiang, Lakshmi N. Reddy, Louise Trevillyan, Ruchir Puri

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

2011

Shedding Physical Synthesis Area Bloat.

Nancy Ying Zhou, Charles J. Alpert, Zhuo Li, Cliff N. Sze, Louise Trevillyan

VLSI Design, 2011

2010

Logical and physical restructuring of fan-in trees.

Hua Xiang, Haoxing Ren, Louise Trevillyan, Lakshmi N. Reddy, Ruchir Puri, Minsik Cho

Proceedings of the 2010 International Symposium on Physical Design, 2010

2008

Placement-Driven Synthesis Design Closure Tool.

Charles J. Alpert, Nathaniel Hieter, Arjen Mets, Ruchir Puri, Lakshmi N. Reddy, Haoxing Ren, Louise Trevillyan

Proceedings of the Handbook of Algorithms for Physical Design Automation., 2008

2004

An Integrated Environment for Technology Closure of Deep-Submicron IC Designs.

Louise Trevillyan, David S. Kung, Ruchir Puri, Lakshmi N. Reddy, Michael A. Kazda

IEEE Des. Test Comput., 2004

2000

EDA in IBM: past, present, and future.

John A. Darringer, Evan E. Davidson, David J. Hathaway, Bernd Koenemann, Mark A. Lavin, Joseph K. Morrell, Khalid Rahmat, Wolfgang Roesner, Erich C. Schanzenbach, Gustavo E. Téllez, Louise Trevillyan

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

LSS: A system for production logic synthesis.

John A. Darringer, Daniel Brand, John V. Gerbi, William H. Joyner Jr., Louise Trevillyan

IBM J. Res. Dev., 2000

1997

Control-flow versus data-flow-based scheduling: combining both approaches in an adaptive scheduling system.

Reinaldo A. Bergamaschi, Salil Raje, Indira Nair, Louise Trevillyan

IEEE Trans. Very Large Scale Integr. Syst., 1997

1996

Representative Traces for Processor Models with Infinite Cache.

Vijay S. Iyengar, Louise Trevillyan, Pradip Bose

Proceedings of the Second International Symposium on High-Performance Computer Architecture, 1996

1991

Global flow optimization in automatic logic design.

C. Leonard Berman, Louise Trevillyan

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

1989

Functional comparison of logic designs for VLSI circuits.

C. Leonard Berman, Louise Trevillyan

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

1988

Improved logic optimization using global flow analysis.

C. Leonard Berman, Louise Trevillyan

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

1987

An Overview of Logic Synthesis Systems.

Louise Trevillyan

Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, USA, June 28, 1987

1986

Global Flow Analysis in Automatic Logic Design.

Louise Trevillyan, William H. Joyner Jr., C. Leonard Berman

IEEE Trans. Computers, 1986

Technology adaption in logic synthesis.

William H. Joyner Jr., Louise Trevillyan, Daniel Brand, Theresa A. Nix, Steven C. Gundersen

Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986

1985

Production logic synthesis.

John A. Darringer, Daniel Brand, William H. Joyner Jr., Louise Trevillyan, John V. Gerbi

Proceedings of the 13th ACM Annual Conference on Computer Science, 1985

1981

Logic Synthesis Through Local Transformations.

John A. Darringer, William H. Joyner Jr., C. Leonard Berman, Louise Trevillyan

IBM J. Res. Dev., 1981

1980

The Experimental Compiling System.

Frances E. Allen, J. Lawrence Carter, Janet Fabri, Jeanne Ferrante, William H. Harrison, Paul G. Loewner, Louise Trevillyan

IBM J. Res. Dev., 1980