Louis Malarsie

According to our database, Louis Malarsie authored at least 3 papers between 2002 and 2003.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2003

Timing Jitter Measurement of Intrinsic Random Jitter and Sinusoidal Jitter Using Frequency Division.

Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Louis Malarsie, Hirobumi Musha

J. Electron. Test., 2003

2002

Timing Jitter Measurement of 10 Gbps Bit Clock Signals Using Frequency Division.

Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Louis Malarsie, Hirobumi Musha

Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002

A New Method for Testing Jitter Tolerance of SerDes Devices Using Sinusoidal Jitter.

Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Hirobumi Musha, Louis Malarsie

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002