Louis Baguena

According to our database, Louis Baguena authored at least 4 papers between 2007 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2014

SiGe Clock and Data Recovery System Based on Injection-Locked Oscillator for 100 Gbit/s Serial Data Link.

Quentin Beraud-Sudreau, Jean-Baptiste Bégueret, Olivier Mazouffre, Michel Pignol, Louis Baguena, Claude Neveu, Yann Deval, Thierry Taris

IEEE J. Solid State Circuits, 2014

2012

VHDL-AMS model of an injection locked VCO.

Quentin Beraud-Sudreau, Olivier Mazouffre, Michel Pignol, Louis Baguena, Claude Neveu, Jean-Baptiste Bégueret, Thierry Taris

Proceedings of the 10th IEEE International NEWCAS Conference, 2012

Windowed phase comparator for an 80Gbit/s CDR.

Quentin Beraud-Sudreau, Olivier Mazouffre, Michel Pignol, Louis Baguena, Claude Neveu, Jean-Baptiste Bégueret, Thierry Taris

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2007

Development of on board, highly flexible, Galileo signal generator ASIC.

Louis Baguena, Emmanuel Liégeon, Alexandra Bépoix, Jean-Marc Dusserre, Christophe Oustric, Philippe Bellocq, Vincent Heiries

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007