Lorenzo Carpineto

According to our database1, Lorenzo Carpineto authored at least 4 papers between 2003 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2009
On the use of behavioral modeling within the RFIC design flow: Satellite receiver case study.
Microelectron. J., 2009

2008
Application of Bottom-Up Methodology to RTW VCO.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

Fully integrated, high performance triple SD PLL (2.2Ghz to 4.4Ghz) with minimized interaction.
Proceedings of the ESSCIRC 2008, 2008

2003
A fully integrated zero-IF transceiver for GSM-GPRS quad-band application.
IEEE J. Solid State Circuits, 2003


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