Longbing Zhang
Orcid: 0009-0004-8374-890X
According to our database1,
Longbing Zhang
authored at least 23 papers
between 2004 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
High-Utilization GPGPU Design for Accelerating GEMM Workloads: An Incremental Approach.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2023
Randomized Testing Framework for Dissecting NVIDIA GPGPU Thread Block-To-SM Scheduling Mechanisms.
Proceedings of the 29th IEEE International Conference on Parallel and Distributed Systems, 2023
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
2022
Ring-ExpLWE: A High-Performance and Lightweight Post-Quantum Encryption Scheme for Resource-Constrained IoT Devices.
IEEE Internet Things J., 2022
Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022
2021
Proceedings of the 2021 IEEE International Conference on Engineering, 2021
2019
EDOA: an efficient delay optimization approach for mixed-polarity Reed-Muller logic circuits under the unit delay model.
Frontiers Comput. Sci., 2019
2017
A Power and Area Optimization Approach of Mixed Polarity Reed-Muller Expression for Incompletely Specified Boolean Functions.
J. Comput. Sci. Technol., 2017
An efficient and fast polarity optimization approach for mixed polarity Reed-Muller logic circuits.
Frontiers Comput. Sci., 2017
An Efficient Polarity Optimization Approach for Fixed Polarity Reed-Muller Logic Circuits Based on Novel Binary Differential Evolution Algorithm.
Proceedings of the Network and Parallel Computing, 2017
2016
EMA-FPRMs: An efficient minimization algorithm for fixed polarity Reed-Muller expressions.
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016
2015
A Fault-Tolerant Java Virtual Machine Using Fast Rejuvenation for Soft-Error-Prone Systems.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the Advanced Parallel Processing Technologies, 2015
2014
Archipelago: A Floorplan Optimized for Concurrent Multiple Applications on Network-on-Chip.
Proceedings of the 9th IEEE International Conference on Networking, 2014
2012
Using Direct Cache Access Combined with Integrated NIC Architecture to Accelerate Network Processing.
Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012
Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012
2011
Proceedings of the Sixth International Conference on Networking, Architecture, and Storage, 2011
2009
Proceedings of the International Conference on Networking, Architecture, and Storage, 2009
2007
Accelerating sequential programs on Chip Multiprocessors via Dynamic Prefetching Thread.
Microprocess. Microsystems, 2007
2006
A Hybrid Hardware/Software Generated Prefetching Thread Mechanism on Chip Multiprocessors.
Proceedings of the Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28, 2006
2004
Parallel program performance evaluation and their behavior analysis on an OpenMP cluster.
Proceedings of the 4th IEEE/ACM International Symposium on Cluster Computing and the Grid (CCGrid 2004), 2004