Loïc Welter
According to our database1,
Loïc Welter
authored at least 7 papers
between 2013 and 2023.
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Bibliography
2023
Proceedings of the 2023 IEEE International Conference on Design, 2023
2015
Improvement of MOSFET matching characterization with calibrated multiplexed test structure.
Microelectron. Reliab., 2015
Dynamic current reduction of CMOS digital circuits through design and process optimization.
Proceedings of the 25th International Workshop on Power and Timing Modeling, 2015
2014
Dynamic power reduction through process and design optimizations on CMOS 80 nm embedded non-volatile memories technology.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
An innovative standard cells remapping method for in-circuit critical parameters monitoring.
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014
Proceedings of the 9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2014
2013
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013