Loïc Cudennec

Orcid: 0000-0002-6476-4574

According to our database1, Loïc Cudennec authored at least 36 papers between 2006 and 2024.

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Bibliography

2024
Enabling federated learning across the computing continuum: Systems, challenges and future directions.
Future Gener. Comput. Syst., 2024

Towards Efficient Learning on the Computing Continuum: Advancing Dynamic Adaptation of Federated Learning.
Proceedings of the 14th Workshop on AI and Scientific Computing at Scale using Flexible Computing Infrastructures, 2024

2023
FedGuard: Selective Parameter Aggregation for Poisoning Attack Mitigation in Federated Learning.
Proceedings of the IEEE International Conference on Cluster Computing, 2023

2022
A Methodology to Build Decision Analysis Tools Applied to Distributed Reinforcement Learning.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

Contributions pour l'utilisation des machines parallèles, réparties et hétérogènes à travers le prisme de la gestion des données partagées.
, 2022

2021
Data Management Model to Program Irregular Compute Kernels on FPGA: Application to Heterogeneous Distributed System.
Proceedings of the Euro-Par 2021: Parallel Processing Workshops, 2021

2020
Software-Distributed Shared Memory for Heterogeneous Machines: Design and Use Considerations.
CoRR, 2020

Adaptive message passing polling for energy efficiency: Application to software-distributed shared memory over heterogeneous computing resources.
Concurr. Comput. Pract. Exp., 2020

A combined fast/cycle accurate simulation tool for reconfigurable accelerator evaluation: application to distributed data management.
Proceedings of the International Workshop on Rapid System Prototyping, 2020

Attribute-Based Encryption and Its Application to a Software-Distributed Shared Memory.
Proceedings of the 17th International Joint Conference on e-Business and Telecommunications, 2020

Experiments Using a Software-Distributed Shared Memory, MPI and 0MQ over Heterogeneous Computing Resources.
Proceedings of the Euro-Par 2020: Parallel Processing Workshops, 2020

2019
Application Topology Definition and Tasks Mapping for Efficient Use of Heterogeneous Resources.
Proceedings of the Euro-Par 2019: Parallel Processing Workshops, 2019

2018
Merging the Publish-Subscribe Pattern with the Shared Memory Paradigm.
Proceedings of the Euro-Par 2018: Parallel Processing Workshops, 2018

2017
M2DC - Modular Microserver DataCentre with heterogeneous hardware.
Microprocess. Microsystems, 2017

Software-Distributed Shared Memory over Heterogeneous Micro-server Architecture.
Proceedings of the Euro-Par 2017: Parallel Processing Workshops, 2017

2016

Network Contention-Aware Method to Evaluate Data Coherency Protocols within a Compilation Toolchain.
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

Pattern Based Cache Coherency Architecture for Embedded Manycores.
Proceedings of the International Conference on Computational Science 2016, 2016

A Fast Evaluation Approach of Data Consistency Protocols within a Compilation Toolchain.
Proceedings of the International Conference on Computational Science 2016, 2016

Deploying software functionality to manufacturing resources safely at runtime.
Proceedings of the 21st IEEE International Conference on Emerging Technologies and Factory Automation, 2016


Towards Flexibility in Future Industrial Manufacturing: A Global Framework for Self-organization of Production Cells.
Proceedings of the 7th International Conference on Ambient Systems, 2016

2015
A Short Overview of Executing Γ Chemical Reactions over the ΣC and τ C Datafl w Programming Models.
Proceedings of the International Conference on Computational Science, 2015

Cycle-based Model to Evaluate Consistency Protocols within a Multi-protocol Compilation Tool-chain.
Proceedings of the 2015 International Workshop on Code Optimisation for Multi and Many Cores, 2015

2014
Using the Spring Physical Model to Extend a Cooperative Caching Protocol for Many-Core Processors.
Proceedings of the IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs, 2014

Generating Code and Memory Buffers to Reorganize Data on Many-core Architectures.
Proceedings of the International Conference on Computational Science, 2014

2013
Introducing a Data Sliding Mechanism for Cooperative Caching in Manycore Architectures.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Throughput Constrained Parallelism Reduction in Cyclo-static Dataflow Applications.
Proceedings of the International Conference on Computational Science, 2013

Extended Cyclostatic Dataflow Program Compilation and Execution for an Integrated Manycore Processor.
Proceedings of the International Conference on Computational Science, 2013

2012
Parallelism Reduction Based on Pattern Substitution in Dataflow Oriented Programming Languages.
Proceedings of the International Conference on Computational Science, 2012

Enhancing Cache Coherent Architectures with access patterns for embedded manycore systems.
Proceedings of the 2012 International Symposium on System on Chip, 2012

2009
CoRDAGe : Un service générique de co-déploiement et redéploiement d'applications sur grilles. (CoRDAGe: a generic service for co-deploying and re-deploying grid applications).
PhD thesis, 2009

2008
Building Hierarchical Grid Storage Using the GfarmGlobal File System and the JuxMemGrid Data-Sharing Service.
Proceedings of the Euro-Par 2008, 2008

2007
Performance scalability of the JXTA P2P framework.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

2006
A Practical Evaluation of a Data Consistency Protocol for Efficient Visualization in Grid Applications.
Proceedings of the High Performance Computing for Computational Science, 2006

Extending the Entry Consistency Model to Enable Efficient Visualization for Code-Coupling Grid Applications.
Proceedings of the Sixth IEEE International Symposium on Cluster Computing and the Grid (CCGrid 2006), 2006


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