Lizy Kurian John
Orcid: 0000-0002-8747-5214Affiliations:
- University of Texas at Austin, USA
According to our database1,
Lizy Kurian John
authored at least 318 papers
between 1991 and 2024.
Collaborative distances:
Collaborative distances:
Awards
ACM Fellow
ACM Fellow 2020, "For contributions to the design, modeling and benchmarking of computer architectures ".
IEEE Fellow
IEEE Fellow 2009, "For contributions to power modeling and performance evaluation of microprocessors".
Timeline
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Online presence:
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Bibliography
2024
NEM-GNN: DAC/ADC-less, Scalable, Reconfigurable, Graph and Sparsity-Aware Near-Memory Accelerator for Graph Neural Networks.
ACM Trans. Archit. Code Optim., June, 2024
SecurityCloak: Protection against cache timing and speculative memory access attacks.
J. Syst. Archit., 2024
HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond.
CoRR, 2024
Proceedings of the 15th ACM/SPEC International Conference on Performance Engineering, 2024
Bandwidth Characterization of DeepSpeed on Distributed Large Language Model Training.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2024
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024
Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024
Proceedings of the 33rd ACM SIGPLAN International Conference on Compiler Construction, 2024
2023
ACM Trans. Archit. Code Optim., December, 2023
Koios 2.0: Open-Source Deep Learning Benchmarks for FPGA Architecture and CAD Research.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023
Neurocomputing, October, 2023
ACM Trans. Reconfigurable Technol. Syst., September, 2023
IEEE Micro, 2023
PIMSAB: A Processing-In-Memory System with Spatially-Aware Communication and Bit-Serial-Aware Computation.
CoRR, 2023
HLSDataset: Open-Source Dataset for ML-Assisted FPGA Design using High Level Synthesis.
CoRR, 2023
Proceedings of the Silicon Valley Cybersecurity Conference, 2023
Proceedings of the IEEE International Symposium on Workload Characterization, 2023
Proceedings of the IEEE International Symposium on Workload Characterization, 2023
Dendrite-inspired Computing to Improve Resilience of Neural Networks to Faults in Emerging Memory Technologies.
Proceedings of the IEEE International Conference on Rebooting Computing, 2023
Proceedings of the 19th Workshop on Hot Topics in Operating Systems, 2023
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023
HLSDataset: Open-Source Dataset for ML-Assisted FPGA Design using High Level Synthesis.
Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023
Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023
Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023
2022
ACM Trans. Reconfigurable Technol. Syst., 2022
Artificial Intelligence at the Edge: Designs and Architectures for Pervasive Intelligence.
IEEE Micro, 2022
IEEE Micro, 2022
Proceedings of the 15th IEEE/ACM International Conference on Utility and Cloud Computing, 2022
Proceedings of the 15th IEEE/ACM International Conference on Utility and Cloud Computing, 2022
LogGen: A Parameterized Generator for Designing Floating-Point Logarithm Units for Deep Learning.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022
Hardware-aware 3D Model Workload Selection and Characterization for Graphics and ML Applications.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022
Proceedings of the International IEEE Symposium on Performance Analysis of Systems and Software, 2022
Proceedings of the ICS '22: 2022 International Conference on Supercomputing, Virtual Event, June 28, 2022
Proceedings of the 51st International Conference on Parallel Processing, 2022
Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022
Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022
Proceedings of the 30th European Symposium on Artificial Neural Networks, 2022
Proceedings of the 30th European Symposium on Artificial Neural Networks, 2022
Proceedings of the 30th European Symposium on Artificial Neural Networks, 2022
Characterization of Emerging AI Workloads: Neural Logic Machines and Graph Convolutional Networks.
Proceedings of the International Conference on Computational Science and Computational Intelligence, 2022
Proceedings of the 33rd IEEE International Conference on Application-specific Systems, 2022
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022
2021
Hardware Accelerator Integration Tradeoffs for High-Performance Computing: A Case Study of GEMM Acceleration in N-Body Methods.
IEEE Trans. Parallel Distributed Syst., 2021
IEEE Micro, 2021
CoRR, 2021
Proceedings of the SAC '21: The 36th ACM/SIGAPP Symposium on Applied Computing, 2021
Virtual-Link: A Scalable Multi-Producer Multi-Consumer Message Queue Architecture for Cross-Core Communication.
Proceedings of the 35th IEEE International Parallel and Distributed Processing Symposium, 2021
Proceedings of the ICPP 2021: 50th International Conference on Parallel Processing, Lemont, IL, USA, August 9, 2021
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021
Proceedings of the 55th Asilomar Conference on Signals, Systems, and Computers, 2021
2020
IEEE Micro, 2020
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2020
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2020
Proceedings of the 27th IEEE International Conference on High Performance Computing, 2020
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020
Proceedings of the 31st IEEE International Conference on Application-specific Systems, 2020
Hamamu: Specializing FPGAs for ML Applications by Adding Hard Matrix Multiplier Blocks.
Proceedings of the 31st IEEE International Conference on Application-specific Systems, 2020
Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020
2019
UT-LCA/Scalability-Phase-Simpoint-of-SPEC-CPU2017: SPEC CPU2017 Integer Speed Suite SimPoint Pinballs.
Dataset, August, 2019
UT-LCA/Scalability-Phase-Simpoint-of-SPEC-CPU2017: SPEC CPU2017 Integer Speed Suite SimPoint Pinballs.
Dataset, August, 2019
ACM Trans. Archit. Code Optim., 2019
J. Comput. Networks Commun., 2019
A Study of Core Utilization and Residency in Heterogeneous Smart Phone Architectures.
Proceedings of the 2019 ACM/SPEC International Conference on Performance Engineering, 2019
Can we trust profiling results?: understanding and fixing the inaccuracy in modern profilers.
Proceedings of the ACM International Conference on Supercomputing, 2019
Reducing Data Movement and Energy in Multilevel Cache Hierarchies without Losing Performance: Can you have it all?
Proceedings of the 28th International Conference on Parallel Architectures and Compilation Techniques, 2019
2018
Start Late or Finish Early: A Distributed Graph Processing System with Redundancy Reduction.
Proc. VLDB Endow., 2018
Proceedings of the 2018 IEEE International Symposium on Workload Characterization, 2018
Proceedings of the 32nd International Conference on Supercomputing, 2018
HALO: A Hierarchical Memory Access Locality Modeling Technique For Memory System Explorations.
Proceedings of the 32nd International Conference on Supercomputing, 2018
Proceedings of the 36th IEEE International Conference on Computer Design, 2018
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018
Proceedings of the Euro-Par 2018: Parallel Processing, 2018
CAMP: Accurate modeling of core and memory locality for proxy generation of big-data applications.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
ComP-net: command processor networking for efficient intra-kernel communications on GPUs.
Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques, 2018
2017
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Int. J. Parallel Program., 2017
Proceedings of the International Conference for High Performance Computing, 2017
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017
Accurate address streams for LLC and beyond (SLAB): A methodology to enable system exploration.
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017
Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017
Proceedings of the 4th IEEE/ACM International Conference on Mobile Software Engineering and Systems, 2017
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017
Proceedings of the Eighth International Green and Sustainable Computing Conference, 2017
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
Exploring Heterogeneous-ISA Core Architectures for High-Performance and Energy-Efficient Mobile SoCs.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
High-level synthesis of approximate hardware under joint precision and voltage scaling.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
IEEE Trans. Computers, 2016
Proceedings of the International Conference for High Performance Computing, 2016
Genesys: Automatically generating representative training sets for predictive benchmarking.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016
Proceedings of the 2016 International Conference on Supercomputing, 2016
Proceedings of the 45th International Conference on Parallel Processing Workshops, 2016
Proceedings of the 45th International Conference on Parallel Processing, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
Fine-grained power analysis of emerging graph processing workloads for cloud operations management.
Proceedings of the 2016 IEEE International Conference on Big Data (IEEE BigData 2016), 2016
Proceedings of the 2016 IEEE International Conference on Big Data (IEEE BigData 2016), 2016
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016
2015
ACM Trans. Comput. Syst., 2015
IEEE Trans. Computers, 2015
BigDataBench-MT: A Benchmark Tool for Generating Realistic Mixed Data Center Workloads.
CoRR, 2015
Proceedings of the International Conference for High Performance Computing, 2015
Proceedings of the 27th International Symposium on Computer Architecture and High Performance Computing, 2015
Proceedings of the 27th International Symposium on Computer Architecture and High Performance Computing, 2015
Proceedings of the 27th International Symposium on Computer Architecture and High Performance Computing, 2015
Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
Proceedings of the 44th International Conference on Parallel Processing, 2015
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
Dynamic power and performance back-annotation for fast and accurate functional hardware simulation.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
BigDataBench-MT: A Benchmark Tool for Generating Realistic Mixed Data Center Workloads.
Proceedings of the Big Data Benchmarks, Performance Optimization, and Emerging Hardware, 2015
2014
Cache Friendliness-Aware Managementof Shared Last-Level Caches for HighPerformance Multi-Core Systems.
IEEE Trans. Computers, 2014
Automatic Generation of Miniaturized Synthetic Proxies for Target Applications to Efficiently Design Multicore Processors.
IEEE Trans. Computers, 2014
IEEE Trans. Computers, 2014
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014
Proceedings of the IEEE 33rd International Performance Computing and Communications Conference, 2014
Proceedings of the 2014 IEEE International Symposium on Workload Characterization, 2014
Proceedings of the 20th IEEE International Conference on Parallel and Distributed Systems, 2014
2013
IEEE Micro, 2013
Proceedings of the ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems, 2013
Flow Migration on Multicore Network Processors: Load Balancing While Minimizing Packet Reordering.
Proceedings of the 42nd International Conference on Parallel Processing, 2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Store-Load-Branch (SLB) predictor: A compiler assisted branch prediction for data dependent branches.
Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013
2012
IEEE Trans. Computers, 2012
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012
Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2012
Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012
Proceedings of the 31st IEEE International Performance Computing and Communications Conference, 2012
Proceedings of the Compiler Construction - 21st International Conference, 2012
Proceedings of the Symposium on Architecture for Networking and Communications Systems, 2012
2011
IEEE Micro, 2011
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
Proprietary code to non-proprietary benchmarks: synthesis techniques for scalable benchmarks.
Proceedings of the ICPE'11, 2011
Proceedings of the SIGMETRICS 2011, 2011
Autocorrelation analysis: a new and improved method for measuring branch predictability.
Proceedings of the SIGMETRICS 2011, 2011
MAximum Multicore POwer (MAMPO): an automatic multithreaded synthetic power virus generation framework for multicore systems.
Proceedings of the Conference on High Performance Computing Networking, 2011
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011
Proceedings of the 2011 IEEE International Symposium on Workload Characterization, 2011
Autocorrelation analysis: A new and improved method for branch predictability characterization.
Proceedings of the 2011 IEEE International Symposium on Workload Characterization, 2011
Proceedings of the 25th International Conference on Supercomputing, 2011, Tucson, AZ, USA, May 31, 2011
MCFQ: Leveraging Memory-level Parallelism and Application's Cache Friendliness for Efficient Management of Quasi-partitioned Last-level Caches.
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011
2010
Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010
AVF Stressmark: Towards an Automated Methodology for Bounding the Worst-Case Vulnerability to Soft Errors.
Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010
Proceedings of the MASCOTS 2010, 2010
Synthesizing memory-level parallelism aware miniature clones for SPEC CPU2006 and ImplantBench workloads.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2010
Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010
Proceedings of the Computer Architecture, 2010
A bandwidth-aware memory-subsystem resource management using non-invasive resource profilers for large CMP systems.
Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010
Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010
System-level max power (SYMPO): a systematic approach for escalating system-level power consumption using synthetic benchmarks.
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
Proceedings of the Computer Performance Evaluation and Benchmarking, 2009
Generation, Validation and Analysis of SPEC CPU2006 Simulation Points Based on Branch, Memory and TLB Characteristics.
Proceedings of the Computer Performance Evaluation and Benchmarking, 2009
ESKIMO: Energy savings using Semantic Knowledge of Inconsequential Memory Occupancy for DRAM subsystem.
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009
Proceedings of the 17th Annual Meeting of the IEEE/ACM International Symposium on Modelling, 2009
Proceedings of the ICPP 2009, 2009
Compiler Controlled Speculation for Power Aware ILP Extraction in Dataflow Architectures.
Proceedings of the High Performance Embedded Architectures and Compilers, 2009
Proceedings of the 46th Design Automation Conference, 2009
Loop-Aware Instruction Scheduling with Dynamic Contention Tracking for Tiled Dataflow Architectures.
Proceedings of the Compiler Construction, 18th International Conference, 2009
2008
ACM Trans. Archit. Code Optim., 2008
Int. J. High Perform. Comput. Netw., 2008
Proceedings of the 4th International Symposium on Workload Characterization (IISWC 2008), 2008
Proceedings of the 4th International Symposium on Workload Characterization (IISWC 2008), 2008
Proceedings of the 22nd Annual International Conference on Supercomputing, 2008
Proceedings of the 2008 International Conference on Parallel Processing, 2008
Proceedings of the 26th International Conference on Computer Design, 2008
Proceedings of the 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 2008
Archer: A Community Distributed Computing Infrastructure for Computer Architecture Research and Education.
Proceedings of the Collaborative Computing: Networking, 2008
2007
OS-Aware Branch Prediction: Improving Microprocessor Control Flow Prediction for Operating Systems.
IEEE Trans. Computers, 2007
Applying Statistical Sampling for Fast and Efficient Simulation of Commercial Workloads.
IEEE Trans. Computers, 2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Complete System Power Estimation: A Trickle-Down Approach Based on Performance Events.
Proceedings of the 2007 IEEE International Symposium on Performance Analysis of Systems and Software, 2007
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
IEEE Trans. Computers, 2006
ACM Trans. Archit. Code Optim., 2006
Microprocess. Microsystems, 2006
Impact of virtual execution environments on processor energy consumption and hardware adaptation.
Proceedings of the 2nd International Conference on Virtual Execution Environments, 2006
Proceedings of the 2006 IEEE International Symposium on Performance Analysis of Systems and Software, 2006
Automatic testcase synthesis and performance model validation for high performance PowerPC processors.
Proceedings of the 2006 IEEE International Symposium on Performance Analysis of Systems and Software, 2006
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006
Proceedings of the 25th IEEE International Performance Computing and Communications Conference, 2006
Proceedings of the 25th IEEE International Performance Computing and Communications Conference, 2006
Proceedings of the 2006 IEEE International Symposium on Workload Characterization, 2006
Performance Cloning: A Technique for Disseminating Proprietary Applications as Benchmarks.
Proceedings of the 2006 IEEE International Symposium on Workload Characterization, 2006
Proceedings of the 15th International Conference on Parallel Architectures and Compilation Techniques (PACT 2006), 2006
2005
IEEE Trans. Parallel Distributed Syst., 2005
Implications of Executing Compression and Encryption Applications on General Purpose Processors.
IEEE Trans. Computers, 2005
ACM Trans. Archit. Code Optim., 2005
Int. J. Parallel Program., 2005
Comput. J., 2005
Proceedings of the 17th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2005), 2005
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2005
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005
Proceedings of the 24th IEEE International Performance Computing and Communications Conference, 2005
Proceedings of the 19th Annual International Conference on Supercomputing, 2005
Proceedings of the 19th Annual International Conference on Supercomputing, 2005
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
Proceedings of the 3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 2005
Architectural Support for Accelerating Congestion Control Applications in Network Processors.
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005
2004
More on finding a single number to indicate overall performance of a benchmark suite.
SIGARCH Comput. Archit. News, 2004
IEEE Comput. Archit. Lett., 2004
Improving Server Performance on Transaction Processing Workloads by Enhanced Data Placement.
Proceedings of the 16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2004), 2004
Proceedings of the 16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2004), 2004
Control Flow Modeling in Statistical Simulation for Accurate and Efficient Processor Design Studies.
Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004
Analysis of the Execution of a Next Generation Application on Superscalar and Grid Processors.
Proceedings of the 10th International Conference on Parallel and Distributed Systems, 2004
2003
Bottlenecks in Multimedia Processing with SIMD Style Extensions and Architectural Enhancements.
IEEE Trans. Computers, 2003
The Role of Return Value Prediction in Exploiting Speculative Method-Level Parallelism.
J. Instr. Level Parallelism, 2003
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003
Proceedings of the International Conference on Measurements and Modeling of Computer Systems, 2003
Exploiting compiler-generated schedules for energy savings in high-performance processors.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
Routine based OS-aware microprocessor resource adaptation for run-time operating system power saving.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
Proceedings of the 30th International Symposium on Computer Architecture (ISCA 2003), 2003
NpBench: A Benchmark Suite for Control plane and Data plane Applications for Network Processors.
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003
2002
Modeling and Evaluation of Control Flow Prediction Schemes Using Complete System Simulation and Java Workloads.
Proceedings of the 10th International Workshop on Modeling, 2002
Proceedings of the 16th international conference on Supercomputing, 2002
Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach.
Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), 2002
Rehashable BTB: An Adaptive Branch Target Buffer to Improve the Target Predictability of Java Code.
Proceedings of the High Performance Computing, 2002
Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), 2002
Implications of Programmable General Purpose Processors for Compression/Encryption Applications.
Proceedings of the 13th IEEE International Conference on Application-Specific Systems, 2002
2001
IEEE Trans. Computers, 2001
ADir_pNB: A Cost-Effective Way to Implement Full Map Directory-Based Cache Coherence Protocols.
IEEE Trans. Computers, 2001
SIGARCH Comput. Archit. News, 2001
Proceedings of the 2001 IEEE International Symposium on Performance Analysis of Systems and Software, 2001
Proceedings of the 2001 IEEE International Symposium on Performance Analysis of Systems and Software, 2001
Proceedings of the 15th international conference on Supercomputing, 2001
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001
2000
Proceedings of the 2000 IEEE International Symposium on Performance Analysis of Systems and Software, 2000
Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000
Proceedings of the 14th international conference on Supercomputing, 2000
Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000
Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, 2000
1999
Microprocess. Microsystems, 1999
Formal Verification of a Snoop-Based Cache Coherence Protocol Using Symbolic Model Checking.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999
Contrasting branch characteristics and branch predictor performance of C++ and C programs.
Proceedings of the IEEE International Performance Computing and Communications Conference, 1999
Proceedings of the IEEE International Performance Computing and Communications Conference, 1999
Exploiting SIMD parallelism in DSP and multimedia algorithms using the AltiVec technology.
Proceedings of the 13th international conference on Supercomputing, 1999
On the Use of Pseudorandom Sequences for High Speed Resource Allocators in Superscalar Processors.
Proceedings of the IEEE International Conference On Computer Design, 1999
Characterization of Java Applications at Bytecode and Ultra-SPARC Machine Code Levels.
Proceedings of the IEEE International Conference On Computer Design, 1999
Proceedings of the IEEE International Conference On Computer Design, 1999
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999
Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999
Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999
1998
IEEE Trans. Very Large Scale Integr. Syst., 1998
The undergraduate curriculum in the electrical and computer engineering department at the University of Texas at Austin.
Proceedings of the 1998 workshop on Computer architecture education, 1998
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998
Proceedings of the 31st Annual IEEE/ACM International Symposium on Microarchitecture, 1998
Proceedings of the 5th International Conference On High Performance Computing, 1998
Hybrid Tree: A Scalable Optoelectronic Interconnection Network for Parallel Computing.
Proceedings of the Thirty-First Annual Hawaii International Conference on System Sciences, 1998
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998
1997
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997
1996
IEEE Trans. Computers, 1996
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996
Proceedings of the Eighth IEEE Symposium on Parallel and Distributed Processing, 1996
1995
Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995
Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture (HPCA 1995), 1995
Proceedings of the 28th Annual Hawaii International Conference on System Sciences (HICSS-28), 1995
1994
Module Partitioning and Interlaced Data Placement Schemes to Reduce Conflicts in Interleaved Memories.
Proceedings of the 1994 International Conference on Parallel Processing, 1994
1992
Microprocess. Microsystems, 1992
Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992
1991
Proceedings of the 18th Annual International Symposium on Computer Architecture. Toronto, 1991
Effect of Hot Spots on Multiprocessor Systems Using Circuit Switched Interconnection Networks.
Proceedings of the International Conference on Parallel Processing, 1991