Lizhen Yu

According to our database, Lizhen Yu authored at least 7 papers between 2008 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2012

Physical-design-friendly hierarchical logic built-in self-test - A case study.

Kelvin Nelson, Jaga Shanmugavadivelu, Jayanth Mekkoth, Venkat Ghanta, Jun Wu, Fei Zhuang, Hao-Jan Chao, Shianling Wu, Jie Rao, Lizhen Yu, Laung-Terng Wang

Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

2011

Using Launch-on-Capture for Testing Scan Designs Containing Synchronous and Asynchronous Clock Domains.

Shianling Wu, Laung-Terng Wang, Xiaoqing Wen, Zhigang Jiang, Lang Tan, Yu Zhang, Yu Hu, Wen-Ben Jone, Michael S. Hsiao, James Chien-Mo Li, Jiun-Lang Huang, Lizhen Yu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

2010

Hybrid Built-In Self-Test Architecture for Multi-port Static RAMs.

Lizhen Yu, Jeffrey Hung, Boryau Sheu, Bill Huynh, Loc Nguyen, Shianling Wu, Laung-Terng Wang, Xiaoqing Wen

Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010

Logic BIST Architecture Using Staggered Launch-on-Shift for Testing Designs Containing Asynchronous Clock Domains.

Shianling Wu, Laung-Terng Wang, Lizhen Yu, Hiroshi Furukawa, Xiaoqing Wen, Wen-Ben Jone, Nur A. Touba, FeiFei Zhao, Jinsong Liu, Hao-Jan Chao, Fangfang Li, Zhigang Jiang

Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010

2009

A Measurement Device for the Dynamic Unbalance of Crankshaft.

Xiaoli Ye, Lizhen Yu, Zhiqin Shen

Proceedings of the 2009 Pacific-Asia Conference on Circuits, Communications and Systems, 2009

Logic BIST Architecture for System-Level Test and Diagnosis.

Jun Qian, Xingang Wang, Qinfu Yang, Fei Zhuang, Junbo Jia, Xiangfeng Li, Yuan Zuo, Jayanth Mekkoth, Jinsong Liu, Hao-Jan Chao, Shianling Wu, Huafeng Yang, Lizhen Yu, FeiFei Zhao, Laung-Terng Wang

Proceedings of the Eighteentgh Asian Test Symposium, 2009

2008

Practical Challenges in Logic BIST Implementation.

Shianling Wu, Hiroshi Furukawa, Boryau Sheu, Laung-Terng Wang, Hao-Jan Chao, Lizhen Yu, Xiaoqing Wen, Michio Murakami

Proceedings of the 17th IEEE Asian Test Symposium, 2008