Liu Liu

According to our database, Liu Liu authored at least 28 papers between 2016 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

TranCIM: Full-Digital Bitline-Transpose CIM-based Sparse Transformer Accelerator With Pipeline/Parallel Reconfigurable Modes.

Fengbin Tu, Zihan Wu, Yiqi Wang, Ling Liang, Liu Liu, Yufei Ding, Leibo Liu, Shaojun Wei, Yuan Xie, Shouyi Yin

IEEE J. Solid State Circuits, 2023

Dynamic N: M Fine-Grained Structured Sparse Attention Mechanism.

Zhaodong Chen, Zheng Qu, Yuying Quan, Liu Liu, Yufei Ding, Yuan Xie

Proceedings of the 28th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming, 2023

ALCOP: Automatic Load-Compute Pipelining in Deep Learning Compiler for AI-GPUs.

Guyue Huang, Yang Bai, Liu Liu, Yuke Wang, Bei Yu, Yufei Ding, Yuan Xie

Proceedings of the Sixth Conference on Machine Learning and Systems, 2023

ECSSD: Hardware/Data Layout Co-Designed In-Storage-Computing Architecture for Extreme Classification.

Siqi Li, Fengbin Tu, Liu Liu, Jilan Lin, Zheng Wang, Yangwook Kang, Yufei Ding, Yuan Xie

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

2022

Elastic Processing and Hardware Architectures for Machine Learning

Liu Liu

PhD thesis, 2022

Dynamic Sparse Attention for Scalable Transformer Acceleration.

Liu Liu, Zheng Qu, Zhaodong Chen, Fengbin Tu, Yufei Ding, Yuan Xie

IEEE Trans. Computers, 2022

Enabling Data Movement and Computation Pipelining in Deep Learning Compiler.

Guyue Huang, Yang Bai, Liu Liu, Yuke Wang, Bei Yu, Yufei Ding, Yuan Xie

CoRR, 2022

A 28nm 15.59µJ/Token Full-Digital Bitline-Transpose CIM-Based Sparse Transformer Accelerator with Pipeline/Parallel Reconfigurable Modes.

Fengbin Tu, Zihan Wu, Yiqi Wang, Ling Liang, Liu Liu, Yufei Ding, Leibo Liu, Shaojun Wei, Yuan Xie, Shouyi Yin

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

INSPIRE: in-storage private information retrieval via protocol and architecture co-design.

Jilan Lin, Ling Liang, Zheng Qu, Ishtiyaque Ahmad, Liu Liu, Fengbin Tu, Trinabh Gupta, Yufei Ding, Yuan Xie

Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

A one-for-all and <i>o</i>(<i>v</i> log(<i>v</i> ))-cost solution for parallel merge style operations on sorted key-value arrays.

Bangyan Wang, Lei Deng, Fei Sun, Guohao Dai, Liu Liu, Yu Wang, Yuan Xie

Proceedings of the ASPLOS '22: 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, 28 February 2022, 2022

DOTA: detect and omit weak attentions for scalable transformer acceleration.

Zheng Qu, Liu Liu, Fengbin Tu, Zhaodong Chen, Yufei Ding, Yuan Xie

Proceedings of the ASPLOS '22: 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, 28 February 2022, 2022

2021

Transformer Acceleration with Dynamic Sparse Attention.

Liu Liu, Zheng Qu, Zhaodong Chen, Yufei Ding, Yuan Xie

CoRR, 2021

Π-RT: A Runtime Framework to Enable Energy-Efficient Real-Time Robotic Vision Applications on Heterogeneous Architectures.

Liu Liu, Jie Tang, Shaoshan Liu, Bo Yu, Yuan Xie, Jean-Luc Gaudiot

Computer, 2021

Efficient tensor core-based GPU kernels for structured sparsity under reduced precision.

Zhaodong Chen, Zheng Qu, Liu Liu, Yufei Ding, Yuan Xie

Proceedings of the International Conference for High Performance Computing, 2021

ENMC: Extreme Near-Memory Classification via Approximate Screening.

Liu Liu, Jilan Lin, Zheng Qu, Yufei Ding, Yuan Xie

Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

2020

SemiMap: A Semi-Folded Convolution Mapping for Speed-Overhead Balance on Crossbars.

Lei Deng, Yuan Xie, Ling Liang, Guanrui Wang, Liang Chang, Xing Hu, Xin Ma, Liu Liu, Jing Pei, Guoqi Li

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Computation on Sparse Neural Networks: an Inspiration for Future Hardware.

Fei Sun, Minghai Qin, Tianyun Zhang, Liu Liu, Yen-Kuang Chen, Yuan Xie

CoRR, 2020

DUET: Boosting Deep Neural Network Efficiency on Dual-Module Architecture.

Liu Liu, Zheng Qu, Lei Deng, Fengbin Tu, Shuangchen Li, Xing Hu, Zhenyu Gu, Yufei Ding, Yuan Xie

Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

Boosting Deep Neural Network Efficiency with Dual-Module Inference.

Liu Liu, Lei Deng, Zhaodong Chen, Yuke Wang, Shuangchen Li, Jingwei Zhang, Yihua Yang, Zhenyu Gu, Yufei Ding, Yuan Xie

Proceedings of the 37th International Conference on Machine Learning, 2020

INVITED: Computation on Sparse Neural Networks and its Implications for Future Hardware.

Fei Sun, Minghai Qin, Tianyun Zhang, Liu Liu, Yen-Kuang Chen, Yuan Xie

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

L1-Norm Batch Normalization for Efficient Training of Deep Neural Networks.

Shuang Wu, Guoqi Li, Lei Deng, Liu Liu, Dong Wu, Yuan Xie, Luping Shi

IEEE Trans. Neural Networks Learn. Syst., 2019

Dynamic Sparse Graph for Efficient Deep Learning.

Liu Liu, Lei Deng, Xing Hu, Maohua Zhu, Guoqi Li, Yufei Ding, Yuan Xie

Proceedings of the 7th International Conference on Learning Representations, 2019

2018

L1-Norm Batch Normalization for Efficient Training of Deep Neural Networks.

Shuang Wu, Guoqi Li, Lei Deng, Liu Liu, Yuan Xie, Luping Shi

CoRR, 2018

PIRT: A Runtime Framework to Enable Energy-Efficient Real-Time Robotic Applications on Heterogeneous Architectures.

Liu Liu, Shaoshan Liu, Zhe Zhang, Bo Yu, Jie Tang, Yuan Xie

CoRR, 2018

2017

Building energy-efficient multi-level cell STT-RAM caches with data compression.

Liu Liu, Ping Chi, Shuangchen Li, Yuanqing Cheng, Yuan Xie

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

CNNLab: a Novel Parallel Framework for Neural Networks using GPU and FPGA-a Practical Study with Trade-off Analysis.

Maohua Zhu, Liu Liu, Chao Wang, Yuan Xie

CoRR, 2016

NVSim-CAM: a circuit-level simulator for emerging nonvolatile memory based content-addressable memory.

Shuangchen Li, Liu Liu, Peng Gu, Cong Xu, Yuan Xie

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Leveraging 3D Technologies for Hardware Security: Opportunities and Challenges.

Peng Gu, Shuangchen Li, Dylan C. Stow, Russell Barnes, Liu Liu, Yuan Xie, Eren Kursun

Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016