Lita Yang

According to our database, Lita Yang authored at least 11 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

11.2 A 3D integrated Prototype System-on-Chip for Augmented Reality Applications Using Face-to-Face Wafer Bonded 7nm Logic at <2μm Pitch with up to 40% Energy Reduction at Iso-Area Footprint.

Tony F. Wu, Huichu Liu, Huseyin Ekin Sumbul, Lita Yang, Dipti Baheti, Jeremy Coriell, William Koven, Anu Krishnan, Mohit Mittal, Matheus Trevisan Moreira, Max Waugaman, Laurent Ye, Edith Beigné

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2022

Three-Dimensional Stacked Neural Network Accelerator Architectures for AR/VR Applications.

Lita Yang, Robert M. Radway, Yu-Hsin Chen, Tony F. Wu, Huichu Liu, Elnaz Ansari, Vikas Chandra, Subhasish Mitra, Edith Beigné

IEEE Micro, 2022

2020

Pushing the Limits of Narrow Precision Inferencing at Cloud Scale with Microsoft Floating Point.

Bita Darvish Rouhani, Daniel Lo, Ritchie Zhao, Ming Liu, Jeremy Fowers, Kalin Ovtcharov, Anna Vinogradsky, Sarah Massengill, Lita Yang, Ray Bittner, Alessandro Forin, Haishan Zhu, Taesik Na, Prerak Patel, Shuai Che, Lok Chand Koppaka, Xia Song, Subhojit Som, Kaustav Das, Saurabh Tiwary, Steven K. Reinhardt, Sitaram Lanka, Eric S. Chung, Doug Burger

Proceedings of the Advances in Neural Information Processing Systems 33: Annual Conference on Neural Information Processing Systems 2020, 2020

2019

An Always-On 3.8 $\mu$ J/86% CIFAR-10 Mixed-Signal Binary CNN Processor With All Memory on Chip in 28-nm CMOS.

Daniel Bankman, Lita Yang, Bert Moons, Marian Verhelst, Boris Murmann

IEEE J. Solid State Circuits, 2019

2018

An always-on 3.8μJ/86% CIFAR-10 mixed-signal binary CNN processor with all memory on chip in 28nm CMOS.

Daniel Bankman, Lita Yang, Bert Moons, Marian Verhelst, Boris Murmann

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

Bit Error Tolerance of a CIFAR-10 Binarized Convolutional Neural Network Processor.

Lita Yang, Daniel Bankman, Bert Moons, Marian Verhelst, Boris Murmann

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

TRIG: hardware accelerator for inference-based applications and experimental demonstration using carbon nanotube FETs.

Gage Hills, Daniel Bankman, Bert Moons, Lita Yang, Jake Hillard, Alex Kahng, Rebecca Park, Marian Verhelst, Boris Murmann, Max M. Shulaker, H.-S. Philip Wong, Subhasish Mitra

Proceedings of the 55th Annual Design Automation Conference, 2018

BinarEye: An always-on energy-accuracy-scalable binary CNN processor with all memory on chip in 28nm CMOS.

Bert Moons, Daniel Bankman, Lita Yang, Boris Murmann, Marian Verhelst

Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017

Approximate SRAM for Energy-Efficient, Privacy-Preserving Convolutional Neural Networks.

Lita Yang, Boris Murmann

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

SRAM voltage scaling for energy-efficient convolutional neural networks.

Lita Yang, Boris Murmann

Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

2015

Mixed-signal circuits for embedded machine-learning applications.

Boris Murmann, Daniel Bankman, Elaina Chai, Daisuke Miyashita, Lita Yang

Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, 2015