Liqun Feng
Orcid: 0000-0002-4450-7618
According to our database1,
Liqun Feng
authored at least 5 papers
between 2022 and 2024.
Collaborative distances:
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Bibliography
2024
A DTC-Free Fractional-N BBPLL With FIR-Embedded Injection-Locked-Oscillator-Based Phase-Domain Lowpass Filter.
IEEE J. Solid State Circuits, March, 2024
14.7 A 0.45V 0.72mW 2.4GHz Bias-Current-Free Fractional-N Hybrid PLL Using a Voltage-Mode Phase Interpolator in 28nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2023
A 2.6GHz ΔΣ Fractional-N Bang-Bang PLL with FIR-Embedded Injection-Locking Phase-Domain Low-Pass Filter.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023
A Low-Voltage Bias-Current-Free Pseudo-Differential Hybrid PLL Using a Time-Interleaving Flip-Flop Phase Detector.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
2022
A Quantization Noise Reduction Method for Delta-Sigma Fractional-N PLLs Using Cascaded Injection-Locked Oscillators.
IEEE Trans. Circuits Syst. II Express Briefs, 2022