Liping Zhong

Orcid: 0009-0008-3344-523X

According to our database1, Liping Zhong authored at least 18 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A 2×56 Gb/s 0.78-pJ/b PAM-4 Crosstalk Cancellation Receiver With Active Crosstalk Extraction Technique in 28-nm CMOS.
IEEE J. Solid State Circuits, September, 2024

Zero-Sequence-Current Suppression of Open-End Winding PMSM With Common DC Bus Based on Virtual Vector Control.
IEEE Trans. Ind. Electron., March, 2024

A 2x112 Gb/s 0.34 pJ/b/Lane Single-Ended PAM4 Receiver with Multi-Order Crosstalk Cancellation and Signal Reutilization Technique in 28-nm CMOS.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

A 2×56Gb/s Single-Ended Orthogonal PAM-7 Transceiver with Encoder-Based Channel-Independent Crosstalk Cancellation in 28-nm CMOS.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

7.6 A 112Gb/s/pin Single-Ended Crosstalk-Cancellation Transceiver with 31dB Loss Compensation in 28nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

13.5 A 64Gb/s/pin PAM4 Single-Ended Transmitter with a Merged Pre-Emphasis Capacitive-Peaking Crosstalk-Cancellation Scheme for Memory Interfaces in 28nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

7.5 A 224Gb/s/wire Single-Ended PAM-4 Transceiver Front-End with 29dB Equalization for 800GbE/1.6TbE.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

A 128Gb/s PAM-4 Transmitter with Edge-Boosting Pulse Generator and Pre-Emphasis Asymmetric Fractional-Spaced FFE in 28nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

2023
A Fully-Integrated LDO with Two-Stage Cross-Coupled Error Amplifier for High-Speed Communications in 28-nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A 28-Gb/s PAM-4 Fully-Integrated Optical Receiver with High-Speed Silicon Photodetector in 28-nm CMOS.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023

A 2 x 24Gb/s Single-Ended Transceiver with Channel-Independent Encoder-Based Crosstalk Cancellation in 28nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

2022
60° phase difference current control-based open-phase fault-tolerant operation strategy for open-end winding permanent synchronous motor.
Int. J. Circuit Theory Appl., 2022

A 2×50Gb/s Single-Ended MIMO PAM-4 Crosstalk Cancellation and Signal Reutilization Receiver in 28 nm CMOS.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

A 112-Gb/s Single-Ended PAM-4 Transceiver Front-End for Reach Extension in Long-Reach Link.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2021
A hybrid discontinuous PWM algorithm of balancing neutral point voltage for 3L-NPC inverter.
Int. J. Circuit Theory Appl., 2021

2020
A 224-Gb/s PAM4 High-Linearity, Energy-Efficiency Differential to Single-Ended Driver in 130-nm SiGe BiCMOS.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

2017
Distributed simultaneous localization and mapping for mobile robot networks via hybrid dynamic belief propagation.
Int. J. Distributed Sens. Networks, 2017

2014
Cooperative Localization of Multi-UAVs via Dynamic Nonparametric Belief Propagation under GPS Signal Loss Condition.
Int. J. Distributed Sens. Networks, 2014


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