Lingyi Huang
Orcid: 0000-0002-8204-4837
According to our database1,
Lingyi Huang
authored at least 19 papers
between 2008 and 2024.
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Bibliography
2024
MoE-I<sup>2</sup>: Compressing Mixture of Experts Models through Inter-Expert Pruning and Intra-Expert Low-Rank Decomposition.
CoRR, 2024
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024
MoE-I²: Compressing Mixture of Experts Models through Inter-Expert Pruning and Intra-Expert Low-Rank Decomposition.
Proceedings of the Findings of the Association for Computational Linguistics: EMNLP 2024, 2024
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
2023
Lightweight design and realisation of autonomously balancing bicycles based on additive manufacturing technology.
Int. J. Comput. Appl. Technol., 2023
CoRR, 2023
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023
DynGMP: Graph Neural Network-Based Motion Planning in Unpredictable Dynamic Environments.
IROS, 2023
Invited Paper: In-Sensor Radio Frequency Computing for Energy-Efficient Intelligent Radar.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
2022
Algorithm and Hardware Co-Design of Energy-Efficient LSTM Networks for Video Recognition With Hierarchical Tucker Tensor Decomposition.
IEEE Trans. Computers, 2022
J. Intell. Syst., 2022
Algorithm and Hardware Co-Design of Energy-Efficient LSTM Networks for Video Recognition with Hierarchical Tucker Tensor Decomposition.
CoRR, 2022
Robot Motion Planning as Video Prediction: A Spatio-Temporal Neural Network-based Motion Planner.
Proceedings of the IEEE/RSJ International Conference on Intelligent Robots and Systems, 2022
Hardware Architecture of Graph Neural Network-Enabled Motion Planner (Invited Paper).
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
IMG-SMP: Algorithm and Hardware Co-Design for Real-time Energy-efficient Neural Motion Planning.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
Proceedings of the 56th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2022, Pacific Grove, CA, USA, October 31, 2022
2021
Algorithm and Hardware Co-design for Deep Learning-powered Channel Decoder: A Case Study.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the 55th Asilomar Conference on Signals, Systems, and Computers, 2021
2008
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008