Liji Wu
Orcid: 0000-0003-1318-6329
According to our database1,
Liji Wu
authored at least 69 papers
between 2011 and 2024.
Collaborative distances:
Collaborative distances:
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
IEEE Trans. Very Large Scale Integr. Syst., September, 2024
A Design of Fault-Tolerant Battery Monitoring IC for Electric Vehicles Complying With ISO 26262.
IEEE Open J. Circuits Syst., 2024
Grafted Trees Bear Better Fruit: An Improved Multiple-Valued Plaintext-Checking Side-Channel Attack against Kyber.
IACR Cryptol. ePrint Arch., 2024
2023
Proceedings of the 15th IEEE International Conference on ASIC, 2023
2021
2020
An ultra-low-power 5GHz front end with feedforward body bias LNA and single to double balance subharmonic mixer topology for direct conversion receiver.
IEICE Electron. Express, 2020
Hardware Trojan Detection Combines with Machine Learning: an Isolation Forest-based Detection Method.
Proceedings of the 14th IEEE International Conference on Big Data Science and Engineering, 2020
2019
Erratum to "A Novel Multiple-Bits Collision Attack Based on Double Detection with Error-Tolerant Mechanism".
Secur. Commun. Networks, 2019
Frontiers Inf. Technol. Electron. Eng., 2019
Proceedings of the Communications, Signal Processing, and Systems, 2019
Proceedings of the Communications, Signal Processing, and Systems, 2019
2018
A Novel Multiple-Bits Collision Attack Based on Double Detection with Error-Tolerant Mechanism.
Secur. Commun. Networks, 2018
Proceedings of the 2nd International Conference on Cryptography, Security and Privacy, 2018
2017
A 25Gb/s serial-link repeater with receiver equalization and transmitter de-emphasis in 0.13μm SiGe BiCMOS.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the 13th International Conference on Computational Intelligence and Security, 2017
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2016
A 70 mW 25 Gb/s Quarter-Rate SerDes Transmitter and Receiver Chipset With 40 dB of Equalization in 65 nm CMOS Technology.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
Microprocess. Microsystems, 2016
A High Precision Multi-Cell Battery Voltage Detecting Circuit for Battery Management Systems.
Proceedings of the IEEE 83rd Vehicular Technology Conference, 2016
Proceedings of the 12th International Conference on Computational Intelligence and Security, 2016
Proceedings of the 12th International Conference on Computational Intelligence and Security, 2016
2015
Secur. Commun. Networks, 2015
KSII Trans. Internet Inf. Syst., 2015
A high-performance elliptic curve cryptographic coprocessor with side channel analysis countermeasures for smart IC card.
IEICE Electron. Express, 2015
Sci. China Inf. Sci., 2015
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015
A 48mW 15-to-28Gb/s source-synchronous receiver with adaptive DFE using hybrid alternate clock scheme and baud-rate CDR in 65nm CMOS.
Proceedings of the ESSCIRC Conference 2015, 2015
Proceedings of the 11th International Conference on Computational Intelligence and Security, 2015
A Novel Detection Algorithm for Ring Oscillator Network Based Hardware Trojan Detection with Tactful FPGA Implementation.
Proceedings of the 11th International Conference on Computational Intelligence and Security, 2015
Proceedings of the 11th International Conference on Computational Intelligence and Security, 2015
A 4×20-Gb/s 0.86pJ/b/lane 2-tap-FFE source-series-terminated transmitter with far-end crosstalk cancellation and divider-less clock generation in 65nm CMOS.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2015, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
2014
IEEE Trans. Circuits Syst. II Express Briefs, 2014
Scalable behavior modeling for SCR based ESD protection structures for circuit simulation.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the Tenth International Conference on Computational Intelligence and Security, 2014
Proceedings of the Tenth International Conference on Computational Intelligence and Security, 2014
Proceedings of the Tenth International Conference on Computational Intelligence and Security, 2014
Proceedings of the Tenth International Conference on Computational Intelligence and Security, 2014
Proceedings of the Tenth International Conference on Computational Intelligence and Security, 2014
Proceedings of the Tenth International Conference on Computational Intelligence and Security, 2014
Algorithm-Based Countermeasures against Power Analysis Attacks for Public-Key Cryptography SM2.
Proceedings of the Tenth International Conference on Computational Intelligence and Security, 2014
2013
A 10 Gbps in-line network security processor based on configurable hetero-multi-cores.
J. Zhejiang Univ. Sci. C, 2013
J. Comput., 2013
Proceedings of the 22nd Wireless and Optical Communication Conference, 2013
Proceedings of the 22nd Wireless and Optical Communication Conference, 2013
Proceedings of the 22nd Wireless and Optical Communication Conference, 2013
Efficient Countermeasures against Fault Attacks for 3DES Crypto Engine in Bank IC Card.
Proceedings of the Ninth International Conference on Computational Intelligence and Security, 2013
A 10-Gb/s simplified transceiver with a quarter-rate 4-tap decision feedback equalizer in 0.18-μm CMOS technology.
Proceedings of the IEEE 10th International Conference on ASIC, 2013
Proceedings of the IEEE 10th International Conference on ASIC, 2013
Proceedings of the IEEE 10th International Conference on ASIC, 2013
Design of 13.56MHz power recovery circuit with signal transmission for contactless bank IC card.
Proceedings of the IEEE 10th International Conference on ASIC, 2013
Proceedings of the IEEE 10th International Conference on ASIC, 2013
2012
Proceedings of the 2012 International Conference on Connected Vehicles and Expo, 2012
Proceedings of the Eighth International Conference on Computational Intelligence and Security, 2012
Proceedings of the Eighth International Conference on Computational Intelligence and Security, 2012
Proceedings of the Eighth International Conference on Computational Intelligence and Security, 2012
2011
Proceedings of the Frontiers in Computer Education [International Conference on Frontiers in Computer Education, 2011
A Configurable IPSec Processor for High Performance In-Line Security Network Processor.
Proceedings of the Seventh International Conference on Computational Intelligence and Security, 2011
Proceedings of the Seventh International Conference on Computational Intelligence and Security, 2011
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
Design and implementation of a low Power Java Coprocessor for dual-interface IC Bank Card.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011