Licai Hao
Orcid: 0000-0002-0637-5132
According to our database1,
Licai Hao
authored at least 13 papers
between 2022 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
High-Performance Latch Designs of Double-Node-Upset Self-Recovery and Triple-Node-Upset Tolerance for Aerospace Applications.
IEEE Trans. Aerosp. Electron. Syst., October, 2024
IEEE Trans. Very Large Scale Integr. Syst., May, 2024
Soft-Error-Immune Quadruple-Node-Upset Tolerant Latch Based on Polarity Design and Source-Isolation Technologies.
IEEE Trans. Very Large Scale Integr. Syst., April, 2024
Flip Point Offset-Compensation Sense Amplifier With Sensing-Margin-Enhancement for Dynamic Random-Access Memory.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2024
A CFMB STT-MRAM-Based Computing-in-Memory Proposal With Cascade Computing Unit for Edge AI Devices.
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2024
Microelectron. J., 2024
An 11-bit two-step column-shared ADC based on Flash/SS architecture for CMOS image sensor.
Microelectron. J., 2024
Microelectron. J., 2024
2023
Novel radiation-hardened-by-design (RHBD) 14T memory cell for aerospace applications in 65 nm CMOS technology.
Microelectron. J., November, 2023
Microelectron. J., February, 2023
Bit-line leakage current tracking and self-compensation circuit for SRAM reliability design.
Microelectron. J., February, 2023
IEICE Electron. Express, 2023
2022
IEICE Electron. Express, 2022