Liang Wang

Orcid: 0000-0002-6112-1928

Affiliations:

Beihang University, School of Computer Science and Engineering, Beijing, China
Tsinghua University, Institute of Microelectronics, Beijing, China (former)
Chinese University of Hong Kong, Department of Computer Science and Engineering, Hong Kong (PhD 2017)

According to our database¹, Liang Wang authored at least 29 papers between 2013 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of three.

Timeline

Legend:

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In proceedings

Article

PhD thesis

Dataset

Other

Bibliography

2024

Minimizing the cost of periodically replicated systems via model and quantitative analysis.

[BibT_eX]

[DOI]

Frontiers Comput. Sci., October, 2024

ReDas: A Lightweight Architecture for Supporting Fine-Grained Reshaping and Multiple Dataflows on Systolic Array.

[BibT_eX]

[DOI]

IEEE Trans. Computers, August, 2024

BitNN: A Bit-Serial Accelerator for K-Nearest Neighbor Search in Point Clouds.

[BibT_eX]

[DOI]

Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

2023

QuickFPS: Architecture and Algorithm Co-Design for Farthest Point Sampling in Large-Scale Point Clouds.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

Dynamic two-side matching of tasks and resources in wide-area distributed computing environments.

[BibT_eX]

[DOI]

J. Supercomput., June, 2023

CFIO: A conflict-free I/O mechanism to fully exploit internal parallelism for Open-Channel SSDs.

[BibT_eX]

[DOI]

J. Syst. Archit., February, 2023

ATA-Cache: Contention Mitigation for GPU Shared L1 Cache with Aggregated Tag Array.

[BibT_eX]

[DOI]

CoRR, 2023

ReDas: Supporting Fine-Grained Reshaping and Multiple Dataflows on Systolic Array.

[BibT_eX]

[DOI]

CoRR, 2023

Shogun: A Task Scheduling Framework for Graph Mining Accelerators.

[BibT_eX]

[DOI]

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

2022

Hypergraph-partitioning-based online joint scheduling of tasks and data.

[BibT_eX]

[DOI]

J. Supercomput., 2022

SWin: A Set-Window Division Mechanism to Alleviate I/O Jitters of NVMe SSD Drives.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022

Upward Packet Popup for Deadlock Freedom in Modular Chiplet-Based Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

2021

A Deflection-Based Deadlock Recovery Framework to Achieve High Throughput for Faulty NoCs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

On Performance Optimization and Quality Control for Approximate-Communication-Enabled Networks-on-Chip.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2021

An enhanced planned obsolescence attack by aging networks-on-chip.

[BibT_eX]

[DOI]

J. Syst. Archit., 2021

UPM-DMA: An Efficient Userspace DMA-Pinned Memory Management Strategy for NVMe SSDs.

[BibT_eX]

[DOI]

Proceedings of the Algorithms and Architectures for Parallel Processing, 2021

2020

Achieving Flexible Global Reconfiguration in NoCs Using Reconfigurable Rings.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2020

Aggressive Fine-Grained Power Gating of NoC Buffers.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

On hardware-trojan-assisted power budgeting system attack targeting many core systems.

[BibT_eX]

[DOI]

J. Syst. Archit., 2020

CDRing: Reconfigurable Ring Architecture by Exploiting Cycle Decomposition of Torus Topology.

[BibT_eX]

[DOI]

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

A Non-Minimal Routing Algorithm for Aging Mitigation in 2D-Mesh NoCs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

A Lifetime Reliability-Constrained Runtime Mapping for Throughput Optimization in Many-Core Systems.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2017

Throughput Optimization for Lifetime Budgeting in Many-Core Systems.

[BibT_eX]

[DOI]

Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

Runtime task mapping for lifetime budgeting in many-core systems.

[BibT_eX]

[DOI]

Proceedings of the 2017 Forum on Specification and Design Languages, 2017

2016

Adaptive Routing Algorithms for Lifetime Reliability Optimization in Network-on-Chip.

[BibT_eX]

[DOI]

Liang Wang

Xiaohang Wang

Terrence S. T. Mak

IEEE Trans. Computers, 2016

SlideAcross: A Low-Latency Adaptive Router for Chip Multi-processor.

[BibT_eX]

[DOI]

Wen Zong

Liang Wang

Qiang Xu

Michael Opoku Agyeman

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2014

Dynamic Programming-Based Lifetime Reliability Optimization in Networks-on-Chip.

[BibT_eX]

[DOI]

Liang Wang

Xiaohang Wang

Terrence S. T. Mak

Proceedings of the VLSI-SoC: Internet of Things Foundations, 2014

Dynamic programming-based lifetime aware adaptive routing algorithm for Network-on-Chip.

[BibT_eX]

[DOI]

Liang Wang

Xiaohang Wang

Terrence S. T. Mak

Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014

2013

Low overhead task migration mechanism in NoC-based MPSoC.

[BibT_eX]

[DOI]

Proceedings of the IEEE 10th International Conference on ASIC, 2013

Liang Wang

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