Liang-Teck Pang

According to our database1, Liang-Teck Pang authored at least 10 papers between 2008 and 2012.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2012
A shorted global clock design for multi-GHz 3D stacked chips.
Proceedings of the Symposium on VLSI Circuits, 2012

2011
Technology Variability From a Design Perspective.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

2010
SRAM stability characterization using tunable ring oscillators in 45nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

Technology variability from a design perspective.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
Measurement and Analysis of Variability in 45 nm Strained-Si CMOS Technology.
IEEE J. Solid State Circuits, 2009

Measurements and Analysis of Process Variability in 90nmCMOS.
IEEE J. Solid State Circuits, 2009

Large-Scale SRAM Variability Characterization in 45 nm CMOS.
IEEE J. Solid State Circuits, 2009

Fixed- and variable-length ring oscillators for variability characterization in 45nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
Measurement and analysis of variability in 45nm strained-Si CMOS technology.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

Compensation of systematic variations through optimal biasing of SRAM wordlines.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008


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