Li-Yang Hong
According to our database1,
Li-Yang Hong
authored at least 8 papers
between 2022 and 2024.
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Bibliography
2024
An 8b-Precision 6T SRAM Computing-in-Memory Macro Using Time-Domain Incremental Accumulation for AI Edge Chips.
IEEE J. Solid State Circuits, July, 2024
An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update.
IEEE J. Solid State Circuits, May, 2024
A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid-Domain Structure for Advanced AI Edge Chips.
IEEE J. Solid State Circuits, January, 2024
Negative Triggering Current Induced the Latch-up in the Circuit without the ESD device to Power.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2024
2023
A 8-b-Precision 6T SRAM Computing-in-Memory Macro Using Segmented-Bitline Charge-Sharing Scheme for AI Edge Chips.
IEEE J. Solid State Circuits, March, 2023
A 22nm 832Kb Hybrid-Domain Floating-Point SRAM In-Memory-Compute Macro with 16.2-70.2TFLOPS/W for High-Accuracy AI-Edge Devices.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
2022
A 28nm 1Mb Time-Domain Computing-in-Memory 6T-SRAM Macro with a 6.6ns Latency, 1241GOPS and 37.01TOPS/W for 8b-MAC Operations for Edge-AI Devices.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
Incorporation of a Simple ESD Circuit in a 650V E-Mode GaN HEMT for All-Terminal ESD Protection.
Proceedings of the IEEE International Reliability Physics Symposium, 2022