Li-Shiuan Peh
Orcid: 0000-0001-9010-6519Affiliations:
- National University of Singapore, Department of Electrical and Computer Engineering, Singapore
- Massachusetts Institute of Technology, Cambridge, USA (2009 - 20016)
- Princeton University, Department of Electrical Engineering, Princeton, NJ, USA (2002 - 2009)
- Stanford University, CA, USA (PhD 2001)
According to our database1,
Li-Shiuan Peh
authored at least 155 papers
between 1996 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2017, "For contributions to the architecture and design automation of networks-on-chip".
Timeline
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Online presence:
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on orcid.org
On csauthors.net:
Bibliography
2024
1.63 pJ/SOP Neuromorphic Processor With Integrated Partial Sum Routers for In-Network Computing.
IEEE Trans. Very Large Scale Integr. Syst., November, 2024
ACM Trans. Comput. Heal., April, 2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2024
A 360 GOPS/W CGRA in a RISC-V SoC with Multi-Hop Routers and Idle-State Instructions for Edge Computing Applications.
Proceedings of the 21st International SoC Design Conference, 2024
PACE: A Scalable and Energy Efficient CGRA in a RISC-V SoC for Edge Computing Applications.
Proceedings of the 36th IEEE Hot Chips Symposium, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the IEEE/ACM Conference on Connected Health: Applications, 2024
2023
AI-On-Skin: Towards Enabling Fast and Scalable On-body AI Inference for Wearable On-Skin Interfaces.
Proc. ACM Hum. Comput. Interact., June, 2023
SeRaNDiP: Leveraging Inherent Sensor Random Noise for Differential Privacy Preservation in Wearable Community Sensing Applications.
Proc. ACM Interact. Mob. Wearable Ubiquitous Technol., 2023
1.7pJ/SOP Neuromorphic Processor with Integrated Partial Sum Routers for In-Network Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Proceedings of the 19th International SoC Design Conference, 2022
REACT: a heterogeneous reconfigurable neural network accelerator with software-configurable NoCs for training and inference on wearables.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
Proceedings of the ASPLOS '22: 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, 28 February 2022, 2022
2021
Proceedings of the NOCS '21: International Symposium on Networks-on-Chip, 2021
Proceedings of the CHI '21: CHI Conference on Human Factors in Computing Systems, 2021
2020
SPECTRUM: A Software-defined Predictable Many-core Architecture for LTE/5G Baseband Processing.
ACM Trans. Embed. Comput. Syst., 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Time-Predictable Software-Defined Architecture with Sdf-Based Compiler Flow for 5g Baseband Processing.
Proceedings of the 2020 IEEE International Conference on Acoustics, 2020
Shenjing: A low power reconfigurable neuromorphic accelerator with partial-sum and spike networks-on-chip.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
pH Watch - Leveraging Pulse Oximeters in Existing Wearables for Reusable, Real-time Monitoring of pH in Sweat.
Proceedings of the 17th Annual International Conference on Mobile Systems, 2019
SPECTRUM: a software defined predictable many-core architecture for LTE baseband processing.
Proceedings of the 20th ACM SIGPLAN/SIGBED International Conference on Languages, 2019
4D-CGRA: Introducing Branch Dimension to Spatio-Temporal Application Mapping on CGRAs.
Proceedings of the International Conference on Computer-Aided Design, 2019
HyCUBE: A 0.9V 26.4 MOPS/mW, 290 pJ/op, Power Efficient Accelerator for IoT Applications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019
2018
ACM Trans. Embed. Comput. Syst., 2018
Stitch: Fusible Heterogeneous Accelerators Enmeshed with Many-Core Architecture for Wearables.
Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018
Proceedings of the 55th Annual Design Automation Conference, 2018
2017
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01755-1, 2017
Automatic place-and-route of emerging LED-driven wires within a monolithically-integrated CMOS-III-V process.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
Low-Power On-Chip Network Providing Guaranteed Services for Snoopy Coherent and Artificial Neural Network Systems.
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
Comput. Commun., 2016
IEEE Comput. Archit. Lett., 2016
Proceedings of the 2016 IEEE International Conference on Robotics and Automation, 2016
Proceedings of the 24th IEEE International Conference on Network Protocols, 2016
Enabling simultaneously bi-directional TSV signaling for energy and area efficient 3D-ICs.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Quest for high-performance bufferless NoCs with single-cycle express paths and self-learning throttling.
Proceedings of the 53rd Annual Design Automation Conference, 2016
2015
Proceedings of the 2015 IEEE International Symposium on Performance Analysis of Systems and Software, 2015
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
2014
IEEE Micro, 2014
Ultralow-Power LED-Enabled On-Chip Optical Communication Designed in the III-Nitride and Silicon CMOS Process Integrated Platform.
IEEE Des. Test, 2014
Similitude: Interfacing a Traffic Simulator and Network Simulator with Emulated Android Clients.
Proceedings of the IEEE 80th Vehicular Technology Conference, 2014
Proceedings of the 12th ACM Conference on Embedded Network Sensor Systems, 2014
Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014
Proceedings of the International Symposium on Low Power Electronics and Design, 2014
SCORPIO: A 36-core research chip demonstrating snoopy coherence on a scalable mesh NoC with in-network ordering.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014
Proceedings of the 2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014
SCORPIO: 36-core shared memory processor demonstrating snoopy coherence on a mesh interconnect.
Proceedings of the 2014 IEEE Hot Chips 26 Symposium (HCS), 2014
Proceedings of the Architectural Support for Programming Languages and Operating Systems, 2014
2013
SWIFT: A Low-Power Network-On-Chip Implementing the Token Flow Control Router Architecture With Swing-Reduced Interconnects.
IEEE Trans. Very Large Scale Integr. Syst., 2013
Single-Cycle Multihop Asynchronous Repeated Traversal: A SMART Future for Reconfigurable On-Chip Networks.
Computer, 2013
Proceedings of the 16th International IEEE Conference on Intelligent Transportation Systems, 2013
Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013
40.4fJ/bit/mm low-swing on-chip signaling with self-resetting logic repeaters embedded within a mesh NoC in 45nm SOI CMOS.
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
IEEE Trans. Mob. Comput., 2012
ACM Trans. Archit. Code Optim., 2012
Proceedings of the 10th ACM Conference on Embedded Network Sensor Systems, 2012
DSENT - A Tool Connecting Emerging Photonics with Electronics for Opto-Electronic Networks-on-Chip Modeling.
Proceedings of the 2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2012
Proceedings of the 12th International Conference on ITS Telecommunications, 2012
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium, 2012
Cross-layer Energy and Performance Evaluation of a Nanophotonic Manycore Processor System Using Real Application Workloads.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium, 2012
Proceedings of the 30th International IEEE Conference on Computer Design, 2012
Approaching the theoretical limits of a mesh NoC with a 16-node chip prototype in 45nm SOI.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
2011
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
J. Parallel Distributed Comput., 2011
RegReS: Adaptively maintaining a target density of regional services in opportunistic vehicular networks.
Proceedings of the Ninth Annual IEEE International Conference on Pervasive Computing and Communications, 2011
Demo: SignalGuru: leveraging mobile phones for collaborative traffic signal schedule advisory.
Proceedings of the 9th International Conference on Mobile Systems, 2011
SignalGuru: leveraging mobile phones for collaborative traffic signal schedule advisory.
Proceedings of the 9th International Conference on Mobile Systems, 2011
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
Proceedings of the 48th Design Automation Conference, 2011
Proceedings of the 48th Design Automation Conference, 2011
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011
2010
Proceedings of the NOCS 2010, 2010
Physical vs. Virtual Express Topologies with Low-Swing Links for Future Many-Core NoCs.
Proceedings of the NOCS 2010, 2010
Proceedings of the 28th International Conference on Computer Design, 2010
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010
2009
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01725-4, 2009
Proceedings of the Multicore Processors and Systems, 2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
IEEE Comput. Archit. Lett., 2009
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2009
Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009
ORION 2.0: A fast and accurate NoC power and area model for early-stage design space exploration.
Proceedings of the Design, Automation and Test in Europe, 2009
2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
IEEE Des. Test Comput., 2008
Proceedings of the Second International Symposium on Networks-on-Chips, 2008
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008
Virtual tree coherence: Leveraging regions and in-network multicast trees for scalable cache coherence.
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008
Design of low-power short-distance opto-electronic transceiver front-ends with scalable supply voltages and frequencies.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008
Proceedings of the 16th Annual IEEE Symposium on High Performance Interconnects (HOTI 2008), 2008
Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, 2008
Proceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques, 2008
2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
Simultaneous Dynamic Voltage Scaling of Processors and Communication Links in Real-Time Distributed Embedded Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2007
Exploring the Design Space of Self-Regulating Power-Aware On/Off Interconnection Networks.
IEEE Trans. Parallel Distributed Syst., 2007
ACM Trans. Archit. Code Optim., 2007
ACM SIGMOBILE Mob. Comput. Commun. Rev., 2007
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007
A 4.6Tbits/s 3.6GHz single-cycle NoC router with a novel switch allocator in 65nm CMOS.
Proceedings of the 25th International Conference on Computer Design, 2007
2006
PowerHerd: a distributed scheme for dynamically satisfying peak-power constraints in interconnection networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Proceedings of the 2006 SIGCOMM workshop on Challenged networks, 2006
Supervised Learning in Sensor Networks: New Approaches with Routing, Reliability Optimizations.
Proceedings of the Third Annual IEEE Communications Society on Sensor and Ad Hoc Communications and Networks, 2006
A supervised learning approach for routing optimizations in wireless sensor networks.
Proceedings of the 2nd International Workshop on Multi-Hop Ad Hoc Networks: From Theory to Reality, 2006
Proceedings of the 14th International Symposium on Modeling, 2006
Proceedings of the 14th International Symposium on Modeling, 2006
Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the 2006 International Conference on Compilers, 2006
2005
IEEE Trans. Parallel Distributed Syst., 2005
SIGARCH Comput. Archit. News, 2005
Int. J. Parallel Program., 2005
A new scheme on link quality prediction and its applications to metric-based routing.
Proceedings of the 3rd International Conference on Embedded Networked Sensor Systems, 2005
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005
Proceedings of the 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 2005
Proceedings of the 2005 Design, 2005
2004
MARio: mobility-adaptive routing using route lifetime abstractions in mobile ad hoc networks.
ACM SIGMOBILE Mob. Comput. Commun. Rev., 2004
Proceedings of the 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 2004
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
Proceedings of the 2004 International Conference on Compilers, 2004
2003
IEEE Micro, 2003
Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
PowerHerd: dynamic satisfaction of peak power constraints in interconnection networks.
Proceedings of the 17th Annual International Conference on Supercomputing, 2003
Dynamic Voltage Scaling with Links for Power Optimization of Interconnection Networks.
Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), 2003
Dynamic power management for power optimization of interconnection networks using on/off links.
Proceedings of the 11th Annual IEEE Symposium on High Performance Interconnects, 2003
2002
IEEE Comput. Archit. Lett., 2002
Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002
Proceedings of the Embedded Software, Second International Conference, 2002
Energy-efficient computing for wildlife tracking: design tradeoffs and early experiences with ZebraNet.
Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), 2002
2001
Flow control and micro-architectural mechanisms for extending the performance of interconnection networks.
PhD thesis, 2001
Proceedings of the Seventh International Symposium on High-Performance Computer Architecture (HPCA'01), 2001
2000
Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, 2000
1997
Proceedings of the Fifth Workshop on Very Large Corpora, 1997
1996