Li Lin
Affiliations:- Marvell, Santa Clara, CA, USA
- University of California, Berkeley, CA, USA (PhD)
According to our database1,
Li Lin
authored at least 10 papers
between 1998 and 2017.
Collaborative distances:
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Bibliography
2017
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
13.7 A 0.23mm<sup>2</sup> digital power amplifier with hybrid time/amplitude control achieving 22.5dBm at 28% PAE for 802.11g.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2016
9.4 A 2×2 WLAN and Bluetooth combo SoC in 28nm CMOS with on-chip WLAN digital power amplifier, integrated 2G/BT SP3T switch and BT pulling cancelation.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
9.6 A 2.7-to-4.3GHz, 0.16psrms-jitter, -246.8dB-FOM, digital fractional-N sampling PLL in 28nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
9.4 A 28nm CMOS digital fractional-N PLL with -245.5dB FOM and a frequency tripler for 802.11abgn/ac radio.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2014
20.5 A 40nm dual-band 3-stream 802.11a/b/g/n/ac MIMO WLAN SoC with 1.1Gb/s over-the-air throughput.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
2009
A fully integrated 2×2 MIMO dual-band dual- mode direct-conversion CMOS transceiver for WiMAX/WLAN applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
2001
A 1.75-GHz highly integrated narrow-band CMOS transmitter with harmonic-rejection mixers.
IEEE J. Solid State Circuits, 2001
1998
Recent developments in high integration multi-standard CMOS transceivers for personal communication systems.
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998