Li-Da Huang

According to our database, Li-Da Huang authored at least 14 papers between 2002 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

A stochastic-based efficient critical area extractor on OpenAccess platform.

Bo-Zhou Chen, Hung-Ming Chen, Li-Da Huang, Po-Cheng Pan

Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

2008

Efficient and optimal post-layout double-cut via insertion by network relaxation and min-cost maximum flow.

Lun-Chun Wei, Hung-Ming Chen, Li-Da Huang, Sarah Songjie Xu

Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

2007

Using power gating techniques in area-array SoC floorplan design.

Chi-Yi Yeh, Hung-Ming Chen, Li-Da Huang, Wei-Ting Wei, Chao-Hung Lu, Chien-Nan Jimmy Liu

Proceedings of the 2007 IEEE International SOC Conference, 2007

OPC-Friendly Bus Driven Floorplanning.

Hua Xiang, Liang Deng, Li-Da Huang, Martin D. F. Wong

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

2005

Simultaneous power supply planning and noise avoidance in floorplan design.

Hung-Ming Chen, Li-Da Huang, I-Min Liu, Martin D. F. Wong

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Redundant-via enhanced maze routing for yield improvement.

Gang Xu, Li-Da Huang, David Z. Pan, Martin D. F. Wong

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

A polynomial time-optimal diode insertion/routing algorithm for fixing antenna problem [IC layout].

Li-Da Huang, Xiaoping Tang, Hua Xiang, Martin D. F. Wong, I-Min Liu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design.

Hung-Ming Chen, I-Min Liu, Martin D. F. Wong, Muzhou Shao, Li-Da Huang

Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004

Optical proximity correction (OPC): friendly maze routing.

Li-Da Huang, Martin D. F. Wong

Proceedings of the 41th Design Automation Conference, 2004

2003

Maze routing with buffer insertion under transition time constraints.

Li-Da Huang, Minghorng Lai, Martin D. F. Wong, Youxin Gao

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Explicit gate delay model for timing evaluation.

Muzhou Shao, Martin D. F. Wong, Huijing Cao, Youxin Gao, Li-Pen Yuan, Li-Da Huang, Seokjin Lee

Proceedings of the 2003 International Symposium on Physical Design, 2003

Global Wire Bus Configuration with Minimum Delay Uncertainty.

Li-Da Huang, Hung-Ming Chen, D. F. Wong

Proceedings of the 2003 Design, 2003

Floorplanning with power supply noise avoidance.

Hung-Ming Chen, Li-Da Huang, I-Min Liu, Minghorng Lai, D. F. Wong

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002

A Polynomial Time Optimal Diode Insertion/Routing Algorithm for Fixing Antenna Problem.

Li-Da Huang, Xiaoping Tang, Hua Xiang, D. F. Wong, I-Min Liu

Proceedings of the 2002 Design, 2002