Lev M. Sambursky

Orcid: 0000-0002-6934-2071

According to our database1, Lev M. Sambursky authored at least 8 papers between 2011 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2021
SPICE Compact BJT, MOSFET, and JFET Models for ICs Simulation in the Wide Temperature Range (From -200 °C to +300 °C).
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

2018
Prediction of High-Temperature Operation (up to +300°C) of Reference Voltage Source Built with Temperature-Tolerant Production Technology.
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018

2017
Electrical characterization and reliability of submicron SOI CMOS technology in the extended temperature range (to 300 °C).
Microelectron. Reliab., 2017

Radiation-Induced Fault Simulation of SOI/SOS CMOS LSI's Using Universal Rad-SPICE MOSFET Model.
J. Electron. Test., 2017

Generalized test automation method for MOSFET's including characteristics measurements and model parameters extraction for aero-space applications.
Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017

2016
Fault simulation in radiation-hardened SOI CMOS VLSIs using universal compact MOSFET model.
Proceedings of the 17th Latin-American Test Symposium, 2016

2013
Simulation of total dose influence on analog-digital SOI/SOS CMOS circuits with EKV-RAD macromodel.
Proceedings of the East-West Design & Test Symposium, 2013

2011
TCAD-SPICE simulation of MOSFET switch delay time for different CMOS technologies.
Proceedings of the 9th East-West Design & Test Symposium, 2011


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