Leonid Belostotski
Orcid: 0000-0002-5228-6907Affiliations:
- University of Calgary, Canada
According to our database1,
Leonid Belostotski
authored at least 83 papers
between 2002 and 2024.
Collaborative distances:
Collaborative distances:
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Online presence:
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on orcid.org
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on ucalgary.ca
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Bibliography
2024
IEEE Trans. Circuits Syst. II Express Briefs, August, 2024
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024
2022
Figures of Merit for CMOS Low-Noise Amplifiers and Estimates for Their Theoretical Limits.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
CoRR, 2022
An LNA Exploiting Intrinsic Gate-Drain Feedback for Wideband Input Match from 7.7 to 33.3 GHz and the Noise-Figure Minimum of 1.83 dB.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022
2021
IEEE Trans. Very Large Scale Integr. Syst., 2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
IEEE J. Solid State Circuits, 2021
Noise-Parameter Measurements of Very-Low-Noise Amplifiers at Ambient and Cryogenic Temperatures.
IEEE Instrum. Meas. Mag., 2021
Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
Automatic Generation of Differential-Input Differential-Output Second-Order Filters Based on a Differential Pair.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Int. J. Circuit Theory Appl., 2020
Int. J. Circuit Theory Appl., 2020
Passive Third-, Fourth-, and Fifth-Order Reconfigurable D-Band Frequency Multipliers Based on Switched-Capacitor Varactors.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
\(\varvec{\varDelta }\) - \(\varvec{\varSigma }\) noise-shaping in 3-D space-time for 2-D wideband antenna array receivers.
Multidimens. Syst. Signal Process., 2019
Extraction of Electrical- and Noise-Parameters of Fully-Differential-Amplifier Subcircuits.
IEEE Access, 2019
An Ultra-Low Power Wide-Band Single-Transistor Second-Order Allpass Filter in 65nm CMOS.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
2018
Wideband N-Beam Arrays Using Low-Complexity Algorithms and Mixed-Signal Integrated Circuits.
IEEE J. Sel. Top. Signal Process., 2018
Analog Approximate-FFT 8/16-Beam Algorithms, Architectures and CMOS Circuits for 5G Beamforming MIMO Transceivers.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Sampling H- & V-Polarized Antennas using a Single ADC for Digital Antenna Arrays by Exploiting Multi-Dimensional Signal Processing RF Circuits.
Proceedings of the 23rd IEEE International Conference on Digital Signal Processing, 2018
2017
Proceedings of the 85th IEEE Vehicular Technology Conference, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Low-complexity N-port ADCs using 2-D Δ-Σ noise-shaping for N-element array receivers.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Design of a low-complexity wideband analog true-time-delay 5-beam array in 65nm CMOS.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the 30th IEEE Canadian Conference on Electrical and Computer Engineering, 2017
2016
5-bit 5-GS/s Noninterleaved Time-Based ADC in 65-nm CMOS for Radio-Astronomy Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
IEEE Trans. Circuits Syst. II Express Briefs, 2016
Wide-band aperture array using a four-channel manifold-type planar multiplexer and digital 2-D IIR filterbank.
Int. J. Circuit Theory Appl., 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
Circuits Syst. Signal Process., 2015
Multi-beam 4 GHz Microwave Apertures Using Current-Mode DFT Approximation on 65 nm CMOS.
CoRR, 2015
Proceedings of the 2015 IEEE Radio and Wireless Symposium, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
A 65-nm CMOS 10-GS/s 4-bit Background-Calibrated Noninterleaved Flash ADC for Radio Astronomy.
IEEE Trans. Very Large Scale Integr. Syst., 2014
A 12.5-Gb/s On-Chip Oscilloscope to Measure Eye Diagrams and Jitter Histograms of High-Speed Signals.
IEEE Trans. Very Large Scale Integr. Syst., 2014
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
Electronically scanned RF-to-bits beam aperture arrays using 2-D IIR spatially bandpass digital filters.
Multidimens. Syst. Signal Process., 2014
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
2013
Low-power CMOS inductorless bandwidth-enhanced transimpedance amplifier for short-haul applications.
Proceedings of the 2013 IEEE Radio and Wireless Symposium, 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
10-GHz current-mode 1<sup>st</sup>- and 2<sup>nd</sup>-order allpass filters on 130nm CMOS.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
A Steerable DC-1 GHz all-pass filter-Sum RF space-time 2-D beam filter in 65 nm CMOS.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
2012
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
High-quality factor asymmetric-slope band-pass filters: A fractional-order capacitor approach.
IET Circuits Devices Syst., 2012
Comparison of LNAs fabricated in 65-nm CMOS GP and LP processes for the Square Kilometre Array.
IEICE Electron. Express, 2012
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
Discrete space continuous time 2D delay block using 2D all-pass frequency planar networks.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 25th IEEE Canadian Conference on Electrical and Computer Engineering, 2012
2011
Recent progress on analog/digital VLSI 2D filter circuits for beamforming antenna arrays.
Proceedings of the 7th International Workshop on Multidimensional (nD) Systems, 2011
Proceedings of the 7th International Workshop on Multidimensional (nD) Systems, 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
Proceedings of the 23rd Canadian Conference on Electrical and Computer Engineering, 2010
2008
IEEE Trans. Instrum. Meas., 2008
2007
Correction to "Noise Figure Optimization of Inductively-Degenerated CMOS LNA's With Integrated Gate Inductors".
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
Sub-0.2 dB Noise Figure Wideband Room-Temperature CMOS LNA With Non-50 Ω Signal-Source Impedance.
IEEE J. Solid State Circuits, 2007
2006
Noise figure optimization of inductively degenerated CMOS LNAs with integrated gate inductors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Linearization Techniques for Cross-Coupled Transconductor Circuits Used in Integrated Q-Enhanced LC Filters.
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006
On Selection of Optimum Signal Source Impedance for Inductively-Degenerated CMOS LNAS.
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006
2002
IEEE Trans. Instrum. Meas., 2002