Leonardo Ecco

According to our database, Leonardo Ecco authored at least 14 papers between 2014 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2021

A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs.

Chirag Sudarshan, Taha Soliman, Cecilia De la Parra, Christian Weis, Leonardo Ecco, Matthias Jung, Norbert Wehn, Andre Guntoro

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020

Enhancing the Utilization of Dot-Product Engines in Deep Learning Accelerators.

Taha Soliman, Armin Runge, Leonardo Ecco

Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

2019

An End-to-End HW/SW Co-Design Methodology to Design Efficient Deep Neural Network Systems using Virtual Models.

Michael J. Klaiber, Sebastian Vogel, Axel Acosta, Robert Korn, Leonardo Ecco, Kristine Back, Andre Guntoro, Ingo Feldner

Proceedings of the INTESA 2019 Proceedings, 2019

2017

Tackling the Bus Turnaround Overhead in Real-Time SDRAM Controllers.

Leonardo Ecco, Rolf Ernst

IEEE Trans. Computers, 2017

Ensuring safety and efficiency in networks-on-chip.

Adam Kostrzewa, Selma Saidi, Leonardo Ecco, Rolf Ernst

Integr., 2017

Architecting high-speed command schedulers for open-row real-time SDRAM controllers.

Leonardo Ecco, Rolf Ernst

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Adaptive load distribution in mixed-critical Networks-on-Chip.

Adam Kostrzewa, Sebastian Tobuschat, Leonardo Ecco, Rolf Ernst

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

Minimizing DRAM Rank Switching Overhead for Improved Timing Bounds and Performance.

Leonardo Ecco, Adam Kostrzewa, Rolf Ernst

Proceedings of the 28th Euromicro Conference on Real-Time Systems, 2016

Dynamic admission control for real-time networks-on-chips.

Adam Kostrzewa, Selma Saidi, Leonardo Ecco, Rolf Ernst

Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015

Real-time DRAM throughput guarantees for latency sensitive mixed QoS MPSoCs.

Leonardo Ecco, Selma Saidi, Adam Kostrzewa, Rolf Ernst

Proceedings of the 10th IEEE International Symposium on Industrial Embedded Systems, 2015

Improved DRAM Timing Bounds for Real-Time DRAM Controllers with Read/Write Bundling.

Leonardo Ecco, Rolf Ernst

Proceedings of the 2015 IEEE Real-Time Systems Symposium, 2015

Flexible TDM-based resource management in on-chip networks.

Adam Kostrzewa, Selma Saidi, Leonardo Ecco, Rolf Ernst

Proceedings of the 23rd International Conference on Real Time Networks and Systems, 2015

2014

A mixed critical memory controller using bank privatization and fixed priority scheduling.

Leonardo Ecco, Sebastian Tobuschat, Selma Saidi, Rolf Ernst

Proceedings of the 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014

Workload-aware shaping of shared resource accesses in mixed-criticality systems.

Sebastian Tobuschat, Moritz Neukirchner, Leonardo Ecco, Rolf Ernst

Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014