Leonard Rarick

According to our database, Leonard Rarick authored at least 4 papers between 2004 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2009

Architecture and Physical Implementation of a Third Generation 65 nm, 16 Core, 32 Thread Chip-Multithreading SPARC Processor.

Georgios K. Konstadinidis, Marc Tremblay, Shailender Chaudhry, Mamun Rashid, Peter F. Lai, Yukio Otaguro, Yannis Orginos, Sudhendra Parampalli, Mark Steigerwald, Shriram Gundala, Rambabu Pyapali, Leonard Rarick, Ilyas Elkin, Yuefei Ge, Ishwar Parulkar

IEEE J. Solid State Circuits, 2009

2008

Implementation of a Third-Generation 16-Core 32-Thread Chip-Multithreading SPARCs® Processor.

Georgios K. Konstadinidis, Mamun Rashid, Peter F. Lai, Yukio Otaguro, Yannis Orginos, Sudhendra Parampalli, Mark Steigerwald, Shriram Gundala, Rambabu Pyapali, Leonard Rarick, Ilyas Elkin, Yuefei Ge, Ishwar Parulkar

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2005

Accelerating Next-Generation Public-Key Cryptosystems on General-Purpose CPUs.

Hans Eberle, Sheueling Chang Shantz, Vipul Gupta, Nils Gura, Leonard Rarick, Lawrence Spracklen

IEEE Micro, 2005

2004

A Public-Key Cryptographic Processor for RSA and ECC.

Hans Eberle, Nils Gura, Sheueling Chang Shantz, Vipul Gupta, Leonard Rarick, Shreyas Sundaram

Proceedings of the 15th IEEE International Conference on Application-Specific Systems, 2004