Lembit Jürimägi

According to our database, Lembit Jürimägi authored at least 13 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Teaching Rapid Application Development Skills for Digitalisation Challenges.

Tarmo Robal, Uljana Reinsalu, Janika Leoste, Lembit Jürimägi, Risto Heinsar

Proceedings of the Digital Business and Intelligent Systems - 16th International Baltic Conference, Baltic DB&IS 2024, Vilnius, Lithuania, June 30, 2024

2020

Calculation of probabilistic testability measures for digital circuits with Structurally Synthesized BDDs.

Lembit Jürimägi, Raimund Ubar, Maksim Jenihhin, Jaan Raik

Microprocess. Microsystems, 2020

2019

Equivalent Transformations of Structurally Synthesized BDDs and Applications.

Lembit Jürimägi, Raimund Ubar, Vladimir Viies

Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

Application Specific True Critical Paths Identification in Sequential Circuits.

Lembit Jürimägi, Raimund Ubar, Maksim Jenihhin, Jaan Raik, Sergei Devadze, Adeboye Stephen Oyeniran

Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

True Path Tracing in Structurally Synthesized BDDs for Testability Analysis of Digital Circuits.

Raimund Ubar, Lembit Jürimägi, Adeniyi Olanrewaju Adekoya, Maksim Jenihhin

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018

Fast identification of true critical paths in sequential circuits.

Raimund Ubar, Sergei Kostin, Maksim Jenihhin, Jaan Raik, Lembit Jürimägi

Microelectron. Reliab., 2018

Hierarchical Timing-Critical Paths Analysis in Sequential Circuits.

Lembit Jurimagi, Raimund Ubar, Maksim Jenihhin, Jaan Raik, Sergei Devadze, Sergei Kostin

Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018

Timing-critical path analysis with structurally synthesized BDDs.

Raimund Ubar, Lembit Jurimagi, Maksim Jenihhin, Jaan Raik, Niyi-Leigh Olugbenga, Vladimir Viies

Proceedings of the 7th Mediterranean Conference on Embedded Computing, 2018

2017

Modeling and simulation of circuits with shared structurally synthesized BDDs.

Raimund Ubar, Lembit Jürimägi, Jaan Raik, Vladimir Viies

Microprocess. Microsystems, 2017

2015

Fault Collapsing in Digital Circuits Using Fast Fault Dominance and Equivalence Analysis with SSBDDs.

Raimund Ubar, Lembit Jürimägi, Elmet Orasson, Jaan Raik

Proceedings of the VLSI-SoC: Design for Reliability, Security, and Low Power, 2015

Scalable algorithm for structural fault collapsing in digital circuits.

Raimund Ubar, Lembit Jurimagi, Elmet Orasson, Jaan Raik

Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015

Shared Structurally Synthesized BDDs for speeding-up parallel pattern simulation in digital circuits.

Raimund Ubar, Lembit Jurimagi, Jaan Raik

Proceedings of the Nordic Circuits and Systems Conference, 2015

Double Phase Fault Collapsing with Linear Complexity in Digital Circuits.

Raimund Ubar, Lembit Jurimagi, Elmet Orasson, Galina Josifovska, Stephen Adeboye Oyeniran

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015