Leila Delshadtehrani

Orcid: 0000-0002-7304-7729

According to our database1, Leila Delshadtehrani authored at least 18 papers between 2015 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
IOMMU Deferred Invalidation Vulnerability: Exploit and Defense.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023
ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2023

SIGFuzz: A Framework for Discovering Microarchitectural Timing Side Channels.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022
ProcessorFuzz: Guiding Processor Fuzzing using Control and Status Registers.
CoRR, 2022

2021
Enabling software security mechanisms through architectural support
PhD thesis, 2021

ECC-United Cache: Maximizing Efficiency of Error Detection/Correction Codes in Associative Cache Memories.
IEEE Trans. Computers, 2021

Network-on-Chip Microarchitecture-based Covert Channel in GPUs.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

TAP-2.5D: A Thermally-Aware Chiplet Placement Methodology for 2.5D Systems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

SealPK: Sealable Protection Keys for RISC-V.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

DirectFuzz: Automated Test Generation for RTL Designs using Directed Graybox Fuzzing.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

FlexFilt: Towards Flexible Instruction Filtering for Security.
Proceedings of the ACSAC '21: Annual Computer Security Applications Conference, Virtual Event, USA, December 6, 2021

2020
Efficient Sealable Protection Keys for RISC-V.
CoRR, 2020

MGPU-TSM: A Multi-GPU System with Truly Shared Memory.
CoRR, 2020

HALCONE : A Hardware-Level Timestamp-based Cache Coherence Scheme for Multi-GPU systems.
CoRR, 2020

PHMon: A Programmable Hardware Monitor and Its Security Use Cases.
Proceedings of the 29th USENIX Security Symposium, 2020

Efficient Context-Sensitive CFI Enforcement Through a Hardware Monitor.
Proceedings of the Detection of Intrusions and Malware, and Vulnerability Assessment, 2020

2018
Nile: A Programmable Monitoring Coprocessor.
IEEE Comput. Archit. Lett., 2018

2015
In-Scratchpad Memory Replication: Protecting Scratchpad Memories in Multicore Embedded Systems against Soft Errors.
ACM Trans. Design Autom. Electr. Syst., 2015


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