Lei Yang
Affiliations:- University of Washington, Seattle, WA, USA
According to our database1,
Lei Yang
authored at least 7 papers
between 2003 and 2024.
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Bibliography
2024
Sensors, January, 2024
2006
Code construction and FPGA implementation of a low-error-floor multi-rate low-density Parity-check code decoder.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006
FROSTY: A program for fast extraction of high-level structural representation from circuit description for industrial CMOS circuits.
Integr., 2006
2005
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
VLSI implementation of a low-error-floor and capacity-approaching low-density parity-check code decoder with multi-rate capacity.
Proceedings of the Global Telecommunications Conference, 2005. GLOBECOM '05, St. Louis, Missouri, USA, 28 November, 2005
An FPGA implementation of low-density parity-check code decoder with multi-rate capability.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003